Unfortunately, (R) and (W) are valid markups for enumerated lists, as described at: https://docutils.sourceforge.io/docs/ref/rst/restructuredtext.html#enumerated-lists So, we ned to replace them by: (R) -> (Read) (W) -> (Write) As otherwise, (R) will be displayed as R., with is not what it is desired. There's no need to touch (RO) and (RW). Acked-by: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/6e81ad8064f3ed4f8dc265086fdf1c618043f935.1604042072.git.mchehab+huawei@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
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			3.2 KiB
		
	
	
	
		
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			83 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| What:		/sys/bus/coresight/devices/<memory_map>.etb/enable_sink
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| Date:		November 2014
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| KernelVersion:	3.19
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(RW) Add/remove a sink from a trace path.  There can be multiple
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| 		source for a single sink.
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| 
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| 		ex::
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| 
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| 		  echo 1 > /sys/bus/coresight/devices/20010000.etb/enable_sink
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/trigger_cntr
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| Date:		November 2014
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| KernelVersion:	3.19
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(RW) Disables write access to the Trace RAM by stopping the
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| 		formatter after a defined number of words have been stored
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| 		following the trigger event. The number of 32-bit words written
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| 		into the Trace RAM following the trigger event is equal to the
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| 		value stored in this register+1 (from ARM ETB-TRM).
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/rdp
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| Date:		March 2016
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| KernelVersion:	4.7
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(Read) Defines the depth, in words, of the trace RAM in powers of
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| 		2.  The value is read directly from HW register RDP, 0x004.
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/sts
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| Date:		March 2016
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| KernelVersion:	4.7
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(Read) Shows the value held by the ETB status register.  The value
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| 		is read directly from HW register STS, 0x00C.
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/rrp
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| Date:		March 2016
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| KernelVersion:	4.7
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(Read) Shows the value held by the ETB RAM Read Pointer register
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| 		that is used to read entries from the Trace RAM over the APB
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| 		interface.  The value is read directly from HW register RRP,
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| 		0x014.
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/rwp
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| Date:		March 2016
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| KernelVersion:	4.7
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(Read) Shows the value held by the ETB RAM Write Pointer register
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| 		that is used to sets the write pointer to write entries from
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| 		the CoreSight bus into the Trace RAM. The value is read directly
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| 		from HW register RWP, 0x018.
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/trg
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| Date:		March 2016
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| KernelVersion:	4.7
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(Read) Similar to "trigger_cntr" above except that this value is
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| 		read directly from HW register TRG, 0x01C.
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/ctl
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| Date:		March 2016
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| KernelVersion:	4.7
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(Read) Shows the value held by the ETB Control register. The value
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| 		is read directly from HW register CTL, 0x020.
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/ffsr
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| Date:		March 2016
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| KernelVersion:	4.7
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(Read) Shows the value held by the ETB Formatter and Flush Status
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| 		register.  The value is read directly from HW register FFSR,
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| 		0x300.
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| 
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| What:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/ffcr
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| Date:		March 2016
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| KernelVersion:	4.7
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| Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
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| Description:	(Read) Shows the value held by the ETB Formatter and Flush Control
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| 		register.  The value is read directly from HW register FFCR,
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| 		0x304.
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