linux/arch/xtensa
Max Filippov a5944195d0 xtensa: implement initialize_cacheattr for MPU cores
Use CONFIG_MEMMAP_CACHEATTR to initialize MPU as described in the Xtensa
LSP RM document. Coalesce adjacent regions with the same cacheattr.
Update Kconfig help text.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-05-07 10:36:34 -07:00
..
boot xtensa: replace variant/core.h with asm/core.h 2019-05-06 17:48:55 -07:00
configs xtensa: rename BUILTIN_DTB to BUILTIN_DTB_SOURCE 2019-01-26 02:02:16 -08:00
include xtensa: implement initialize_cacheattr for MPU cores 2019-05-07 10:36:34 -07:00
kernel xtensa: add exclusive atomics support 2019-05-07 10:36:31 -07:00
lib xtensa: replace variant/core.h with asm/core.h 2019-05-06 17:48:55 -07:00
mm xtensa: fix format string warning in init_pmd 2019-04-04 18:45:55 -07:00
oprofile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
platforms xtensa: replace variant/core.h with asm/core.h 2019-05-06 17:48:55 -07:00
variants xtensa: add test_kc705_be variant 2018-08-20 12:34:45 -07:00
Kconfig xtensa: implement initialize_cacheattr for MPU cores 2019-05-07 10:36:34 -07:00
Kconfig.debug Kconfig: consolidate the "Kernel hacking" menu 2018-08-02 08:06:48 +09:00
Makefile xtensa: generate uapi header and syscall table header files 2018-12-02 23:45:41 -08:00