Files
linux/arch/x86/kernel/cpu/mce/intel.c
Tony Luck a331f5fdd3 x86/mce: Add Xeon Sapphire Rapids to list of CPUs that support PPIN
New CPU model, same MSRs to control and read the inventory number.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20210319173919.291428-1-tony.luck@intel.com
2021-03-20 12:12:10 +01:00

14 KiB