forked from Minki/linux
51533b615e
New CRIS sub architecture named v32. From: Dave Jones <davej@redhat.com> Fix swapped kmalloc args Signed-off-by: Mikael Starvik <starvik@axis.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
191 lines
5.4 KiB
C
191 lines
5.4 KiB
C
#ifndef __iop_mpu_defs_h
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#define __iop_mpu_defs_h
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/*
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* This file is autogenerated from
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* file: ../../inst/io_proc/rtl/iop_mpu.r
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* id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
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* last modfied: Mon Apr 11 16:08:45 2005
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*
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* by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_mpu_defs.h ../../inst/io_proc/rtl/iop_mpu.r
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* id: $Id: iop_mpu_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
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* Any changes here will be lost.
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*
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* -*- buffer-read-only: t -*-
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*/
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/* Main access macros */
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#ifndef REG_RD
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#define REG_RD( scope, inst, reg ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR
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#define REG_WR( scope, inst, reg, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_VECT
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#define REG_RD_VECT( scope, inst, reg, index ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_VECT
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#define REG_WR_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT
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#define REG_RD_INT( scope, inst, reg ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT
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#define REG_WR_INT( scope, inst, reg, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT_VECT
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#define REG_RD_INT_VECT( scope, inst, reg, index ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT_VECT
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#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_TYPE_CONV
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#define REG_TYPE_CONV( type, orgtype, val ) \
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( { union { orgtype o; type n; } r; r.o = val; r.n; } )
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#endif
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#ifndef reg_page_size
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#define reg_page_size 8192
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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/* C-code for register scope iop_mpu */
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#define STRIDE_iop_mpu_rw_r 4
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/* Register rw_r, scope iop_mpu, type rw */
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typedef unsigned int reg_iop_mpu_rw_r;
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#define REG_RD_ADDR_iop_mpu_rw_r 0
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#define REG_WR_ADDR_iop_mpu_rw_r 0
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/* Register rw_ctrl, scope iop_mpu, type rw */
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typedef struct {
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unsigned int en : 1;
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unsigned int dummy1 : 31;
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} reg_iop_mpu_rw_ctrl;
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#define REG_RD_ADDR_iop_mpu_rw_ctrl 128
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#define REG_WR_ADDR_iop_mpu_rw_ctrl 128
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/* Register r_pc, scope iop_mpu, type r */
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typedef struct {
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unsigned int addr : 12;
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unsigned int dummy1 : 20;
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} reg_iop_mpu_r_pc;
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#define REG_RD_ADDR_iop_mpu_r_pc 132
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/* Register r_stat, scope iop_mpu, type r */
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typedef struct {
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unsigned int instr_reg_busy : 1;
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unsigned int intr_busy : 1;
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unsigned int intr_vect : 16;
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unsigned int dummy1 : 14;
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} reg_iop_mpu_r_stat;
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#define REG_RD_ADDR_iop_mpu_r_stat 136
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/* Register rw_instr, scope iop_mpu, type rw */
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typedef unsigned int reg_iop_mpu_rw_instr;
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#define REG_RD_ADDR_iop_mpu_rw_instr 140
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#define REG_WR_ADDR_iop_mpu_rw_instr 140
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/* Register rw_immediate, scope iop_mpu, type rw */
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typedef unsigned int reg_iop_mpu_rw_immediate;
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#define REG_RD_ADDR_iop_mpu_rw_immediate 144
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#define REG_WR_ADDR_iop_mpu_rw_immediate 144
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/* Register r_trace, scope iop_mpu, type r */
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typedef struct {
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unsigned int intr_vect : 16;
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unsigned int pc : 12;
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unsigned int en : 1;
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unsigned int instr_reg_busy : 1;
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unsigned int intr_busy : 1;
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unsigned int dummy1 : 1;
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} reg_iop_mpu_r_trace;
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#define REG_RD_ADDR_iop_mpu_r_trace 148
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/* Register r_wr_stat, scope iop_mpu, type r */
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typedef struct {
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unsigned int r0 : 1;
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unsigned int r1 : 1;
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unsigned int r2 : 1;
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unsigned int r3 : 1;
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unsigned int r4 : 1;
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unsigned int r5 : 1;
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unsigned int r6 : 1;
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unsigned int r7 : 1;
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unsigned int r8 : 1;
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unsigned int r9 : 1;
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unsigned int r10 : 1;
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unsigned int r11 : 1;
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unsigned int r12 : 1;
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unsigned int r13 : 1;
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unsigned int r14 : 1;
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unsigned int r15 : 1;
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unsigned int dummy1 : 16;
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} reg_iop_mpu_r_wr_stat;
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#define REG_RD_ADDR_iop_mpu_r_wr_stat 152
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#define STRIDE_iop_mpu_rw_thread 4
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/* Register rw_thread, scope iop_mpu, type rw */
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typedef struct {
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unsigned int addr : 12;
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unsigned int dummy1 : 20;
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} reg_iop_mpu_rw_thread;
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#define REG_RD_ADDR_iop_mpu_rw_thread 156
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#define REG_WR_ADDR_iop_mpu_rw_thread 156
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#define STRIDE_iop_mpu_rw_intr 4
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/* Register rw_intr, scope iop_mpu, type rw */
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typedef struct {
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unsigned int addr : 12;
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unsigned int dummy1 : 20;
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} reg_iop_mpu_rw_intr;
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#define REG_RD_ADDR_iop_mpu_rw_intr 196
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#define REG_WR_ADDR_iop_mpu_rw_intr 196
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/* Constants */
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enum {
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regk_iop_mpu_no = 0x00000000,
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regk_iop_mpu_r_pc_default = 0x00000000,
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regk_iop_mpu_rw_ctrl_default = 0x00000000,
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regk_iop_mpu_rw_intr_size = 0x00000010,
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regk_iop_mpu_rw_r_size = 0x00000010,
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regk_iop_mpu_rw_thread_default = 0x00000000,
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regk_iop_mpu_rw_thread_size = 0x00000004,
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regk_iop_mpu_yes = 0x00000001
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};
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#endif /* __iop_mpu_defs_h */
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