Vineet Gupta 9fabcc636b ARC: [arcompact] entry.S: Elide extra check/branch in exception ret path ... This is done by improving the laddering logic ! Before: if Exception goto excep_or_pure_k_ret if !Interrupt(L2) goto l1_chk else INTERRUPT_EPILOGUE 2 l1_chk: if !Interrupt(L1) (i.e. pure kernel mode) goto excep_or_pure_k_ret else INTERRUPT_EPILOGUE 1 excep_or_pure_k_ret: EXCEPTION_EPILOGUE Now: if !Interrupt(L1 or L2) (i.e. exception or pure kernel mode) goto excep_or_pure_k_ret ; guaranteed to be an interrupt if !Interrupt(L2) goto l1_ret else INTERRUPT_EPILOGUE 2 ; by virtue of above, no need to chk for L1 active l1_ret: INTERRUPT_EPILOGUE 1 excep_or_pure_k_ret: EXCEPTION_EPILOGUE Signed-off-by: Vineet Gupta <vgupta@synopsys.com>		2015-10-17 17:48:23 +05:30
..
boot	ARC: add/fix some comments in code - no functional change	2015-08-20 19:05:49 +05:30
configs	ARCv2: [vdk] dts files and defconfig for HS38 VDK	2015-06-25 06:00:21 +05:30
include	ARC: [arcompact] entry.S: Improve early return from exception	2015-10-17 17:48:22 +05:30
kernel	ARC: [arcompact] entry.S: Elide extra check/branch in exception ret path	2015-10-17 17:48:23 +05:30
lib	ARCv2: lib: memset: Don't assume 64-bit load/stores	2015-07-20 17:44:37 +03:00
mm	ARCv2: mm: THP: flush_pmd_tlb_range make SMP safe	2015-10-17 17:48:21 +05:30
oprofile	ARC: OProfile support	2013-02-15 23:16:00 +05:30
plat-axs10x	ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs	2015-09-11 19:34:01 -07:00
plat-sim	ARCv2: [nsim*hs*] Support simulation platforms for HS38x cores	2015-06-25 06:00:19 +05:30
plat-tb10x	ARC: [plat*] move code out of .init_machine into common	2014-10-13 14:46:13 +05:30
Kbuild
Kconfig	ARCv2: mm: THP support	2015-10-17 17:48:18 +05:30
Kconfig.debug	ARC: With earlycon in use, retire EARLY_PRINTK	2015-05-11 11:20:21 +05:30
Makefile	ARCv2: add knob for DIV_REV in Kconfig	2015-07-20 13:33:30 +03:00