forked from Minki/linux
9f7ef9854e
For dependency tracking we currently use targets that fall out of the
gcc -MD command. We store this info in the .cmd file and include as
makefile during the build.
This format put object as target and all the c and header files as
dependencies, like:
util/abspath.o: util/abspath.c /usr/include/stdc-predef.h util/cache.h \
/usr/include/bits/wordsize.h /usr/include/gnu/stubs.h \
...
If any of those dependency header files (krava.h below) is removed the
build fails on:
make[1]: *** No rule to make target 'krava.h', needed by 'inc.o'. Stop.
This patch adds fixdep helper, that is used by kbuild to alter the shape
of the object dependencies like:
source_util/abspath.o := util/abspath.c
deps_util/abspath.o := \
/usr/include/stdc-predef.h \
util/cache.h \
...
util/abspath.o: $(deps_util/abspath.o)
$(deps_util/abspath.o):
With this format the header removal won't make the build fail, because
it'll be picked up by the last empty target defined for each header.
As previously mentioned the fixdep tool is taken from kbuild. It's not
complete backport, only the part that alters the standard dependency
info was taken, the part that adds the CONFIG_* dependency logic will be
probably taken later on.
Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Cc: David Ahern <dsahern@gmail.com>
Cc: Kai Germaschewski <kai.germaschewski@gmx.de>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1443004442-32660-4-git-send-email-jolsa@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
44 lines
905 B
Makefile
44 lines
905 B
Makefile
ifeq ($(srctree),)
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srctree := $(patsubst %/,%,$(dir $(shell pwd)))
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srctree := $(patsubst %/,%,$(dir $(srctree)))
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endif
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include $(srctree)/tools//scripts/Makefile.include
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define allow-override
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$(if $(or $(findstring environment,$(origin $(1))),\
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$(findstring command line,$(origin $(1)))),,\
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$(eval $(1) = $(2)))
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endef
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$(call allow-override,CC,$(CROSS_COMPILE)gcc)
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$(call allow-override,LD,$(CROSS_COMPILE)ld)
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ifeq ($(V),1)
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Q =
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else
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Q = @
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endif
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export Q srctree CC LD
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MAKEFLAGS := --no-print-directory
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build := -f $(srctree)/tools/build/Makefile.build dir=. obj
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all: fixdep
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clean:
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$(call QUIET_CLEAN, fixdep)
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$(Q)find . -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete
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$(Q)rm -f fixdep
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$(OUTPUT)fixdep-in.o: FORCE
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$(Q)$(MAKE) $(build)=fixdep
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$(OUTPUT)fixdep: $(OUTPUT)fixdep-in.o
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$(QUIET_LINK)$(CC) $(LDFLAGS) -o $@ $<
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FORCE:
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.PHONY: FORCE
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