Koji Matsuoka 9cdced8a39 drm: rcar-du: Fix display timing controller parameter ... There is a bug in the setting of the DES (Display Enable Signal) register. This current setting occurs 1 dot left shift. The DES register should be set minus one value about the specifying value with H/W specification. This patch corrects it. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>		2016-11-15 01:44:50 +02:00
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drm	drm: rcar-du: Fix display timing controller parameter	2016-11-15 01:44:50 +02:00
host1x	drm/tegra: dsi: Enhance runtime power management	2016-08-24 15:58:57 +02:00
ipu-v3	gpu: ipu-v3: Add queued image conversion support	2016-09-19 08:30:27 +02:00
vga	vgaarbiter: rst-ifiy and polish kerneldoc	2016-08-16 18:49:56 +02:00
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