9a127cff91
This patch adds support to allow bitclk and osrclk per i2s dai port. on APQ8016 there are 4 i2s ports each one has its own bit clks. Without this patch its not possible to support multiple i2s ports in the lpass driver. Tested-by: Kenneth Westfield <kwestfie@codeaurora.org> Acked-by: Kenneth Westfield <kwestfie@codeaurora.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
83 lines
2.5 KiB
C
83 lines
2.5 KiB
C
/*
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* Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* lpass.h - Definitions for the QTi LPASS
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*/
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#ifndef __LPASS_H__
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#define __LPASS_H__
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#include <linux/clk.h>
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#include <linux/compiler.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#define LPASS_AHBIX_CLOCK_FREQUENCY 131072000
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#define LPASS_MAX_MI2S_PORTS (8)
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/* Both the CPU DAI and platform drivers will access this data */
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struct lpass_data {
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/* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
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struct clk *ahbix_clk;
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/* MI2S system clock */
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struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS];
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/* MI2S bit clock (derived from system clock by a divider */
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struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS];
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/* low-power audio interface (LPAIF) registers */
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void __iomem *lpaif;
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/* regmap backed by the low-power audio interface (LPAIF) registers */
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struct regmap *lpaif_map;
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/* interrupts from the low-power audio interface (LPAIF) */
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int lpaif_irq;
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/* SOC specific variations in the LPASS IP integration */
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struct lpass_variant *variant;
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};
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/* Vairant data per each SOC */
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struct lpass_variant {
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u32 i2sctrl_reg_base;
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u32 i2sctrl_reg_stride;
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u32 i2s_ports;
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u32 irq_reg_base;
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u32 irq_reg_stride;
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u32 irq_ports;
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u32 rdma_reg_base;
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u32 rdma_reg_stride;
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u32 rdma_channels;
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/* SOC specific intialization like clocks */
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int (*init)(struct platform_device *pdev);
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int (*exit)(struct platform_device *pdev);
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int (*alloc_dma_channel)(struct lpass_data *data);
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int (*free_dma_channel)(struct lpass_data *data, int ch);
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/* SOC specific dais */
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struct snd_soc_dai_driver *dai_driver;
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int num_dai;
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};
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/* register the platform driver from the CPU DAI driver */
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int asoc_qcom_lpass_platform_register(struct platform_device *);
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int asoc_qcom_lpass_cpu_platform_remove(struct platform_device *pdev);
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int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev);
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int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai);
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extern struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops;
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#endif /* __LPASS_H__ */
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