forked from Minki/linux
dfdcff3215
Some RISC-V fixes for v5.4-rc4: - Fix the virtual memory layout so the fixaddr region doesn't overlap with other regions. (This was originally intended to go in as part of an earlier patch, but I inadvertently dropped it during a rebase.) - Add the DT chosen/stdout-path property to the HiFive Unleashed DT file. This is so "earlycon" can be specified with no arguments on the kernel command line, and the correct UART will be automatically selected. And two cleanup patches: - Simplify the code in our breakpoint trap handler. - Drop a comment in our TLB flush code that has caused some confusion. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl2qS2MACgkQx4+xDQu9 KksbNg/9FkWN0OvkFNWvj79IYYSc5wvdntTnDdaij9a5/RQ/mTQKjB411ZnL99Yt 7ac+NxzJAJ2i3h+D0ijudwY27vAbvVBEA4rT4SDjo5ENa7ceomt5tdCGmRKaJVpN Qz5Tvhx+KYJ3iROp8+MLkYzIgHFpB4vcSVwruxi5r5Dtnr+doclzgD6bAuzEz3It AQ00upeuB02cbTsu5OclFQ+6BuJ+V2ERQ3CQzNs9+p69ax/1etCYY+n+ZDwhlZ0U XoXSVs8hn9zjFviU0CySCVwReoZUAermU+q7r06BxWrLHixAmIQEgNZGKc3E+KRt nvMKlgjGFMpSo28OrJS7ron2jjC9bGLpI177SgelnH5lZCAyx/xWT9snk51AUyv0 aCVwEZVVSsohfNB5d7zkZq3uWHnoxOlGcISkBe0bVER4o8jBKNYJcF1rjQKt2dYR +4zZVpQNS9aOyrvpa4zIKIyuy4sxuOgE1gNmgVU/rEOpzgysqM+zqzW2JJ9UKJdd 9IXFGpUYSJMAQxIEslSfEQ2Ep+L/n1AMGn4fFEDdNiDGYwC6miLxrLc1zw6MR3DA ds470VAZL6uvt0TvSWxRLVI/2LA80S2TrfzEcHp/Stzc8U/wPppO4ZCw7npgTYfa qMedZQm58+t99/Uh1RXRWq8ciC/3aC490WtrN6ZgMofZRyLU4XI= =aGYX -----END PGP SIGNATURE----- Merge tag 'riscv/for-v5.4-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: "Some RISC-V fixes: - Fix the virtual memory layout so the fixaddr region doesn't overlap with other regions. (This was originally intended to go in as part of an earlier patch, but I inadvertently dropped it during a rebase) - Add the DT chosen/stdout-path property to the HiFive Unleashed DT file. This is so "earlycon" can be specified with no arguments on the kernel command line, and the correct UART will be automatically selected. And two cleanup patches: - Simplify the code in our breakpoint trap handler. - Drop a comment in our TLB flush code that has caused some confusion" * tag 'riscv/for-v5.4-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: RISC-V: fix virtual address overlapped in FIXADDR_START and VMEMMAP_START riscv: tlbflush: remove confusing comment on local_flush_tlb_all() riscv: dts: HiFive Unleashed: add default chosen/stdout-path riscv: remove the switch statement in do_trap_break() |
||
---|---|---|
.. | ||
alpha | ||
arc | ||
arm | ||
arm64 | ||
c6x | ||
csky | ||
h8300 | ||
hexagon | ||
ia64 | ||
m68k | ||
microblaze | ||
mips | ||
nds32 | ||
nios2 | ||
openrisc | ||
parisc | ||
powerpc | ||
riscv | ||
s390 | ||
sh | ||
sparc | ||
um | ||
unicore32 | ||
x86 | ||
xtensa | ||
.gitignore | ||
Kconfig |