990a40079a
SoCs that contain MDP5 have a top level wrapper called MDSS that manages clocks, power and irq for the sub-blocks within it. Currently, the MDSS portions are stuffed into the MDP5 driver. This makes it hard to represent the DT bindings in the correct way. We create a top level MDSS helper that handles these parts. This is essentially moving out some of the mdp5_kms irq code and MDSS register space and keeping it as a separate entity. We haven't given any clocks to the top level MDSS yet, but a AHB clock would be added in the future to access registers. One thing to note is that the resources allocated by this helper are tied to the top level platform_device (the one that allocates the drm_device struct too). This device would be the parent to MDSS sub-blocks like MDP5, DSI, eDP etc. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> |
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| .. | ||
| mdp5_cfg.c | ||
| mdp5_cfg.h | ||
| mdp5_cmd_encoder.c | ||
| mdp5_crtc.c | ||
| mdp5_ctl.c | ||
| mdp5_ctl.h | ||
| mdp5_encoder.c | ||
| mdp5_irq.c | ||
| mdp5_kms.c | ||
| mdp5_kms.h | ||
| mdp5_mdss.c | ||
| mdp5_plane.c | ||
| mdp5_smp.c | ||
| mdp5_smp.h | ||
| mdp5.xml.h | ||