forked from Minki/linux
2d888f48e0
Emulate deprecated 'setend' instruction for AArch32 bit tasks. setend [le/be] - Sets the endianness of EL0 On systems with CPUs which support mixed endian at EL0, the hardware support for the instruction can be enabled by setting the SCTLR_EL1.SED bit. Like the other emulated instructions it is controlled by an entry in /proc/sys/abi/. For more information see : Documentation/arm64/legacy_instructions.txt The instruction is emulated by setting/clearing the SPSR_EL1.E bit, which will be reflected in the PSTATE.E in AArch32 context. This patch also restores the native endianness for the execution of signal handlers, since the process could have changed the endianness. Note: All CPUs on the system must have mixed endian support at EL0. Once the handler is registered, hotplugging a CPU which doesn't support mixed endian, could lead to unexpected results/behavior in applications. Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
58 lines
2.1 KiB
Plaintext
58 lines
2.1 KiB
Plaintext
The arm64 port of the Linux kernel provides infrastructure to support
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emulation of instructions which have been deprecated, or obsoleted in
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the architecture. The infrastructure code uses undefined instruction
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hooks to support emulation. Where available it also allows turning on
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the instruction execution in hardware.
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The emulation mode can be controlled by writing to sysctl nodes
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(/proc/sys/abi). The following explains the different execution
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behaviours and the corresponding values of the sysctl nodes -
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* Undef
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Value: 0
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Generates undefined instruction abort. Default for instructions that
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have been obsoleted in the architecture, e.g., SWP
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* Emulate
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Value: 1
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Uses software emulation. To aid migration of software, in this mode
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usage of emulated instruction is traced as well as rate limited
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warnings are issued. This is the default for deprecated
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instructions, .e.g., CP15 barriers
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* Hardware Execution
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Value: 2
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Although marked as deprecated, some implementations may support the
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enabling/disabling of hardware support for the execution of these
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instructions. Using hardware execution generally provides better
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performance, but at the loss of ability to gather runtime statistics
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about the use of the deprecated instructions.
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The default mode depends on the status of the instruction in the
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architecture. Deprecated instructions should default to emulation
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while obsolete instructions must be undefined by default.
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Note: Instruction emulation may not be possible in all cases. See
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individual instruction notes for further information.
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Supported legacy instructions
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-----------------------------
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* SWP{B}
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Node: /proc/sys/abi/swp
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Status: Obsolete
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Default: Undef (0)
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* CP15 Barriers
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Node: /proc/sys/abi/cp15_barrier
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Status: Deprecated
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Default: Emulate (1)
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* SETEND
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Node: /proc/sys/abi/setend
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Status: Deprecated
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Default: Emulate (1)*
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Note: All the cpus on the system must have mixed endian support at EL0
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for this feature to be enabled. If a new CPU - which doesn't support mixed
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endian - is hotplugged in after this feature has been enabled, there could
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be unexpected results in the application.
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