tegra: - Tegra186 hardware cursor support - better capability reporting for different SoC - better framebuffer modifier support - host1x fixes ttm: - fix unswappable BO handling efifb: - check for PCI before using it amdgpu: - Fixes for Aldebaran - Display LTTPR fixes - eDP fixes - Fixes for Vangogh - RAS fixes - ASPM support - Renoir SMU fixes - Modifier fixes - Misc code cleanups - Freesync fixes i915: - Several fixes to GLK handling in recent display refactoring - Rare watchdog timer race fix - Cppcheck redundant condition fix - Overlay error code propagation fix - Documentation fix - gvt: Remove one unused function warning - gvt: Fix intel_gvt_init_device() return type - gvt: Remove one duplicated register accessible check -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJgi1hjAAoJEAx081l5xIa+ydkP/1Etl4S07UiLkWtHNOl5lj33 RCCfjjeqTc5Md2qXuCknEsju38P493Pqhh1j7Nl02QHE1pIyTEjhKTdv/zt7aC0R jVUw4ZvtkqN2U1azS8Wfa+YBqrkerrdGIvaIJa/s9eLN+r+/Vb7Crid5NJg5/RQL NLN2Riw95MrvrsGFnZRli8qiLbIK2pj3553KZWJim4o9Fp+1TAesXVLI1+qXoIRk WWLuhwLxPLSb+ONCbrcOFSAwxVZLwRM90B+jwnhRYLS/Zo1hcWhn9ua5RBdyC5zU rGuOA6dWmI4o4L0X+IaNLD4qOGAWTp1dnJtvKj4rQVfSR82hWcTlCnVcZgxjjydx m56TlBLGYvilClM5tmRUdW5QKW4c9DP7dAr3XiKyYOuL2pRkg904ziQs4fVwmOgV PfDNm/aA+40UKPwLu0+JM7aQO5OgL8pg1FpOck5qOIx9fAQrulPp9OHDbxXVAzax t6YmmBnlXShZSooEkwfoCILkdZuNwmj1sXwUh3QzeQj6owk4tg+LWJIqK9mHt+lQ YuyueS+hOn1uSzhtLs9QdQvNssLVd490i0tyU/GGNMw/QVyi9gg4Iq2dVk00L9if lFQ7PgPslT+ExIdVutsnuLsy9N2by0AcxFJLdYKELTTicTVhYKzArGeCxni/A35r 7ZmtSPvbuY7g1//n03Nb =4Wh+ -----END PGP SIGNATURE----- Merge tag 'drm-next-2021-04-30' of git://anongit.freedesktop.org/drm/drm Pull more drm updates from Dave Airlie: "Looks like I missed a tegra feature request for next, but should still be fine since it's pretty self contained. Apart from that got a set of i915 and amdgpu fixes as per usual along with a few misc fixes. tegra: - Tegra186 hardware cursor support - better capability reporting for different SoC - better framebuffer modifier support - host1x fixes ttm: - fix unswappable BO handling efifb: - check for PCI before using it amdgpu: - Fixes for Aldebaran - Display LTTPR fixes - eDP fixes - Fixes for Vangogh - RAS fixes - ASPM support - Renoir SMU fixes - Modifier fixes - Misc code cleanups - Freesync fixes i915: - Several fixes to GLK handling in recent display refactoring - Rare watchdog timer race fix - Cppcheck redundant condition fix - Overlay error code propagation fix - Documentation fix - gvt: Remove one unused function warning - gvt: Fix intel_gvt_init_device() return type - gvt: Remove one duplicated register accessible check" * tag 'drm-next-2021-04-30' of git://anongit.freedesktop.org/drm/drm: (111 commits) efifb: Check efifb_pci_dev before using it drm/i915: Fix docbook descriptions for i915_gem_shrinker drm/i915: fix an error code in intel_overlay_do_put_image() drm/i915/display/psr: Fix cppcheck warnings drm/i915: Disable LTTPR detection on GLK once again drm/i915: Restore lost glk ccs w/a drm/i915: Restore lost glk FBC 16bpp w/a drm/i915: Take request reference before arming the watchdog timer drm/ttm: fix error handling if no BO can be swapped out v4 drm/i915/gvt: Remove duplicated register accessible check drm/amdgpu/gmc9: remove dummy read workaround for newer chips drm/amdgpu: Add mem sync flag for IB allocated by SA drm/amdgpu: Fix SDMA RAS error reporting on Aldebaran drm/amdgpu: Reset RAS error count and status regs Revert "drm/amdgpu: workaround the TMR MC address issue (v2)" drm/amd/display: 3.2.132 drm/amd/display: [FW Promotion] Release 0.0.62 drm/amd/display: add helper for enabling mst stream features drm/amd/display: Report Proper Quantization Range in AVI Infoframe drm/amd/display: Fix call to pass bpp in 16ths of a bit ...
461 lines
12 KiB
C
461 lines
12 KiB
C
/*
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* Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Kevin Tian <kevin.tian@intel.com>
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* Eddie Dong <eddie.dong@intel.com>
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*
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* Contributors:
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* Niu Bing <bing.niu@intel.com>
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* Zhi Wang <zhi.a.wang@intel.com>
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*
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*/
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#include <linux/types.h>
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#include <linux/kthread.h>
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#include "i915_drv.h"
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#include "intel_gvt.h"
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#include "gvt.h"
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#include <linux/vfio.h>
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#include <linux/mdev.h>
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struct intel_gvt_host intel_gvt_host;
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static const char * const supported_hypervisors[] = {
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[INTEL_GVT_HYPERVISOR_XEN] = "XEN",
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[INTEL_GVT_HYPERVISOR_KVM] = "KVM",
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};
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static struct intel_vgpu_type *
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intel_gvt_find_vgpu_type(struct intel_gvt *gvt, unsigned int type_group_id)
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{
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if (WARN_ON(type_group_id >= gvt->num_types))
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return NULL;
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return &gvt->types[type_group_id];
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}
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static ssize_t available_instances_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr,
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char *buf)
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{
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struct intel_vgpu_type *type;
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unsigned int num = 0;
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void *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;
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type = intel_gvt_find_vgpu_type(gvt, mtype_get_type_group_id(mtype));
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if (!type)
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num = 0;
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else
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num = type->avail_instance;
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return sprintf(buf, "%u\n", num);
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}
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static ssize_t device_api_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr, char *buf)
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{
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return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
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}
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static ssize_t description_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr, char *buf)
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{
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struct intel_vgpu_type *type;
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void *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;
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type = intel_gvt_find_vgpu_type(gvt, mtype_get_type_group_id(mtype));
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if (!type)
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return 0;
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return sprintf(buf, "low_gm_size: %dMB\nhigh_gm_size: %dMB\n"
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"fence: %d\nresolution: %s\n"
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"weight: %d\n",
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BYTES_TO_MB(type->low_gm_size),
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BYTES_TO_MB(type->high_gm_size),
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type->fence, vgpu_edid_str(type->resolution),
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type->weight);
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}
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static MDEV_TYPE_ATTR_RO(available_instances);
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static MDEV_TYPE_ATTR_RO(device_api);
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static MDEV_TYPE_ATTR_RO(description);
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static struct attribute *gvt_type_attrs[] = {
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&mdev_type_attr_available_instances.attr,
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&mdev_type_attr_device_api.attr,
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&mdev_type_attr_description.attr,
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NULL,
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};
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static struct attribute_group *gvt_vgpu_type_groups[] = {
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[0 ... NR_MAX_INTEL_VGPU_TYPES - 1] = NULL,
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};
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static bool intel_get_gvt_attrs(struct attribute_group ***intel_vgpu_type_groups)
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{
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*intel_vgpu_type_groups = gvt_vgpu_type_groups;
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return true;
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}
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static int intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt)
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{
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int i, j;
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struct intel_vgpu_type *type;
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struct attribute_group *group;
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for (i = 0; i < gvt->num_types; i++) {
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type = &gvt->types[i];
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group = kzalloc(sizeof(struct attribute_group), GFP_KERNEL);
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if (WARN_ON(!group))
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goto unwind;
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group->name = type->name;
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group->attrs = gvt_type_attrs;
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gvt_vgpu_type_groups[i] = group;
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}
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return 0;
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unwind:
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for (j = 0; j < i; j++) {
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group = gvt_vgpu_type_groups[j];
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kfree(group);
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}
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return -ENOMEM;
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}
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static void intel_gvt_cleanup_vgpu_type_groups(struct intel_gvt *gvt)
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{
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int i;
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struct attribute_group *group;
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for (i = 0; i < gvt->num_types; i++) {
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group = gvt_vgpu_type_groups[i];
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gvt_vgpu_type_groups[i] = NULL;
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kfree(group);
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}
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}
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static const struct intel_gvt_ops intel_gvt_ops = {
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.emulate_cfg_read = intel_vgpu_emulate_cfg_read,
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.emulate_cfg_write = intel_vgpu_emulate_cfg_write,
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.emulate_mmio_read = intel_vgpu_emulate_mmio_read,
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.emulate_mmio_write = intel_vgpu_emulate_mmio_write,
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.vgpu_create = intel_gvt_create_vgpu,
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.vgpu_destroy = intel_gvt_destroy_vgpu,
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.vgpu_release = intel_gvt_release_vgpu,
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.vgpu_reset = intel_gvt_reset_vgpu,
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.vgpu_activate = intel_gvt_activate_vgpu,
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.vgpu_deactivate = intel_gvt_deactivate_vgpu,
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.gvt_find_vgpu_type = intel_gvt_find_vgpu_type,
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.get_gvt_attrs = intel_get_gvt_attrs,
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.vgpu_query_plane = intel_vgpu_query_plane,
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.vgpu_get_dmabuf = intel_vgpu_get_dmabuf,
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.write_protect_handler = intel_vgpu_page_track_handler,
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.emulate_hotplug = intel_vgpu_emulate_hotplug,
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};
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static void init_device_info(struct intel_gvt *gvt)
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{
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struct intel_gvt_device_info *info = &gvt->device_info;
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struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev);
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info->max_support_vgpus = 8;
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info->cfg_space_size = PCI_CFG_SPACE_EXP_SIZE;
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info->mmio_size = 2 * 1024 * 1024;
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info->mmio_bar = 0;
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info->gtt_start_offset = 8 * 1024 * 1024;
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info->gtt_entry_size = 8;
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info->gtt_entry_size_shift = 3;
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info->gmadr_bytes_in_cmd = 8;
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info->max_surface_size = 36 * 1024 * 1024;
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info->msi_cap_offset = pdev->msi_cap;
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}
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static void intel_gvt_test_and_emulate_vblank(struct intel_gvt *gvt)
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{
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struct intel_vgpu *vgpu;
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int id;
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mutex_lock(&gvt->lock);
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idr_for_each_entry((&(gvt)->vgpu_idr), (vgpu), (id)) {
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if (test_and_clear_bit(INTEL_GVT_REQUEST_EMULATE_VBLANK + id,
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(void *)&gvt->service_request)) {
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if (vgpu->active)
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intel_vgpu_emulate_vblank(vgpu);
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}
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}
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mutex_unlock(&gvt->lock);
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}
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static int gvt_service_thread(void *data)
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{
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struct intel_gvt *gvt = (struct intel_gvt *)data;
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int ret;
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gvt_dbg_core("service thread start\n");
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while (!kthread_should_stop()) {
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ret = wait_event_interruptible(gvt->service_thread_wq,
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kthread_should_stop() || gvt->service_request);
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if (kthread_should_stop())
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break;
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if (WARN_ONCE(ret, "service thread is waken up by signal.\n"))
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continue;
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intel_gvt_test_and_emulate_vblank(gvt);
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if (test_bit(INTEL_GVT_REQUEST_SCHED,
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(void *)&gvt->service_request) ||
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test_bit(INTEL_GVT_REQUEST_EVENT_SCHED,
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(void *)&gvt->service_request)) {
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intel_gvt_schedule(gvt);
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}
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}
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return 0;
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}
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static void clean_service_thread(struct intel_gvt *gvt)
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{
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kthread_stop(gvt->service_thread);
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}
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static int init_service_thread(struct intel_gvt *gvt)
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{
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init_waitqueue_head(&gvt->service_thread_wq);
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gvt->service_thread = kthread_run(gvt_service_thread,
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gvt, "gvt_service_thread");
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if (IS_ERR(gvt->service_thread)) {
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gvt_err("fail to start service thread.\n");
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return PTR_ERR(gvt->service_thread);
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}
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return 0;
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}
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/**
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* intel_gvt_clean_device - clean a GVT device
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* @i915: i915 private
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*
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* This function is called at the driver unloading stage, to free the
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* resources owned by a GVT device.
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*
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*/
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void intel_gvt_clean_device(struct drm_i915_private *i915)
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{
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struct intel_gvt *gvt = fetch_and_zero(&i915->gvt);
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if (drm_WARN_ON(&i915->drm, !gvt))
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return;
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intel_gvt_destroy_idle_vgpu(gvt->idle_vgpu);
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intel_gvt_cleanup_vgpu_type_groups(gvt);
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intel_gvt_clean_vgpu_types(gvt);
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intel_gvt_debugfs_clean(gvt);
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clean_service_thread(gvt);
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intel_gvt_clean_cmd_parser(gvt);
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intel_gvt_clean_sched_policy(gvt);
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intel_gvt_clean_workload_scheduler(gvt);
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intel_gvt_clean_gtt(gvt);
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intel_gvt_free_firmware(gvt);
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intel_gvt_clean_mmio_info(gvt);
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idr_destroy(&gvt->vgpu_idr);
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kfree(i915->gvt);
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}
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/**
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* intel_gvt_init_device - initialize a GVT device
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* @i915: drm i915 private data
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*
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* This function is called at the initialization stage, to initialize
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* necessary GVT components.
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*
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*/
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int intel_gvt_init_device(struct drm_i915_private *i915)
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{
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struct intel_gvt *gvt;
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struct intel_vgpu *vgpu;
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int ret;
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if (drm_WARN_ON(&i915->drm, i915->gvt))
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return -EEXIST;
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gvt = kzalloc(sizeof(struct intel_gvt), GFP_KERNEL);
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if (!gvt)
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return -ENOMEM;
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gvt_dbg_core("init gvt device\n");
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idr_init_base(&gvt->vgpu_idr, 1);
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spin_lock_init(&gvt->scheduler.mmio_context_lock);
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mutex_init(&gvt->lock);
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mutex_init(&gvt->sched_lock);
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gvt->gt = &i915->gt;
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i915->gvt = gvt;
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init_device_info(gvt);
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ret = intel_gvt_setup_mmio_info(gvt);
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if (ret)
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goto out_clean_idr;
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intel_gvt_init_engine_mmio_context(gvt);
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ret = intel_gvt_load_firmware(gvt);
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if (ret)
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goto out_clean_mmio_info;
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ret = intel_gvt_init_irq(gvt);
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if (ret)
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goto out_free_firmware;
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ret = intel_gvt_init_gtt(gvt);
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if (ret)
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goto out_free_firmware;
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ret = intel_gvt_init_workload_scheduler(gvt);
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if (ret)
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goto out_clean_gtt;
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ret = intel_gvt_init_sched_policy(gvt);
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if (ret)
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goto out_clean_workload_scheduler;
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ret = intel_gvt_init_cmd_parser(gvt);
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if (ret)
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goto out_clean_sched_policy;
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ret = init_service_thread(gvt);
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if (ret)
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goto out_clean_cmd_parser;
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ret = intel_gvt_init_vgpu_types(gvt);
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if (ret)
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goto out_clean_thread;
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ret = intel_gvt_init_vgpu_type_groups(gvt);
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if (ret) {
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gvt_err("failed to init vgpu type groups: %d\n", ret);
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goto out_clean_types;
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}
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vgpu = intel_gvt_create_idle_vgpu(gvt);
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if (IS_ERR(vgpu)) {
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ret = PTR_ERR(vgpu);
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gvt_err("failed to create idle vgpu\n");
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goto out_clean_types;
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}
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gvt->idle_vgpu = vgpu;
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intel_gvt_debugfs_init(gvt);
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gvt_dbg_core("gvt device initialization is done\n");
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intel_gvt_host.dev = i915->drm.dev;
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intel_gvt_host.initialized = true;
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return 0;
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out_clean_types:
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intel_gvt_clean_vgpu_types(gvt);
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out_clean_thread:
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clean_service_thread(gvt);
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out_clean_cmd_parser:
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intel_gvt_clean_cmd_parser(gvt);
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out_clean_sched_policy:
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intel_gvt_clean_sched_policy(gvt);
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out_clean_workload_scheduler:
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intel_gvt_clean_workload_scheduler(gvt);
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out_clean_gtt:
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intel_gvt_clean_gtt(gvt);
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out_free_firmware:
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intel_gvt_free_firmware(gvt);
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out_clean_mmio_info:
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intel_gvt_clean_mmio_info(gvt);
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out_clean_idr:
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idr_destroy(&gvt->vgpu_idr);
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kfree(gvt);
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i915->gvt = NULL;
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return ret;
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}
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|
|
int
|
|
intel_gvt_pm_resume(struct intel_gvt *gvt)
|
|
{
|
|
intel_gvt_restore_fence(gvt);
|
|
intel_gvt_restore_mmio(gvt);
|
|
intel_gvt_restore_ggtt(gvt);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
intel_gvt_register_hypervisor(const struct intel_gvt_mpt *m)
|
|
{
|
|
int ret;
|
|
void *gvt;
|
|
|
|
if (!intel_gvt_host.initialized)
|
|
return -ENODEV;
|
|
|
|
if (m->type != INTEL_GVT_HYPERVISOR_KVM &&
|
|
m->type != INTEL_GVT_HYPERVISOR_XEN)
|
|
return -EINVAL;
|
|
|
|
/* Get a reference for device model module */
|
|
if (!try_module_get(THIS_MODULE))
|
|
return -ENODEV;
|
|
|
|
intel_gvt_host.mpt = m;
|
|
intel_gvt_host.hypervisor_type = m->type;
|
|
gvt = (void *)kdev_to_i915(intel_gvt_host.dev)->gvt;
|
|
|
|
ret = intel_gvt_hypervisor_host_init(intel_gvt_host.dev, gvt,
|
|
&intel_gvt_ops);
|
|
if (ret < 0) {
|
|
gvt_err("Failed to init %s hypervisor module\n",
|
|
supported_hypervisors[intel_gvt_host.hypervisor_type]);
|
|
module_put(THIS_MODULE);
|
|
return -ENODEV;
|
|
}
|
|
gvt_dbg_core("Running with hypervisor %s in host mode\n",
|
|
supported_hypervisors[intel_gvt_host.hypervisor_type]);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(intel_gvt_register_hypervisor);
|
|
|
|
void
|
|
intel_gvt_unregister_hypervisor(void)
|
|
{
|
|
intel_gvt_hypervisor_host_exit(intel_gvt_host.dev);
|
|
module_put(THIS_MODULE);
|
|
}
|
|
EXPORT_SYMBOL_GPL(intel_gvt_unregister_hypervisor);
|