94afd069d9
Currently unsigned ints are used to represent instructions on powerpc. This has worked well as instructions have always been 4 byte words. However, ISA v3.1 introduces some changes to instructions that mean this scheme will no longer work as well. This change is Prefixed Instructions. A prefixed instruction is made up of a word prefix followed by a word suffix to make an 8 byte double word instruction. No matter the endianness of the system the prefix always comes first. Prefixed instructions are only planned for powerpc64. Introduce a ppc_inst type to represent both prefixed and word instructions on powerpc64 while keeping it possible to exclusively have word instructions on powerpc32. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> [mpe: Fix compile error in emulate_spe()] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200506034050.24806-12-jniethe5@gmail.com
36 lines
674 B
C
36 lines
674 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef _ASM_POWERPC_INST_H
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#define _ASM_POWERPC_INST_H
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/*
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* Instruction data type for POWER
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*/
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struct ppc_inst {
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u32 val;
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} __packed;
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#define ppc_inst(x) ((struct ppc_inst){ .val = x })
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static inline u32 ppc_inst_val(struct ppc_inst x)
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{
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return x.val;
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}
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static inline int ppc_inst_primary_opcode(struct ppc_inst x)
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{
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return ppc_inst_val(x) >> 26;
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}
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static inline struct ppc_inst ppc_inst_swab(struct ppc_inst x)
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{
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return ppc_inst(swab32(ppc_inst_val(x)));
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}
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static inline bool ppc_inst_equal(struct ppc_inst x, struct ppc_inst y)
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{
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return ppc_inst_val(x) == ppc_inst_val(y);
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}
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#endif /* _ASM_POWERPC_INST_H */
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