0d9a302da0
Numerous schemas are missing 'additionalProperties: false' statements which ensures a binding doesn't have any extra undocumented properties or child nodes. Fixing this reveals various missing properties, so let's fix all those occurrences. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for-iio Acked-by: Stephen Boyd <sboyd@kernel.org> # clock Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: dri-devel@lists.freedesktop.org Cc: netdev@vger.kernel.org Cc: Guillaume La Roque <glaroque@baylibre.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Mark Brown <broonie@kernel.org> Cc: linux-iio@vger.kernel.org Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-clk@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kevin Hilman <khilman@baylibre.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net> Cc: linux-amlogic@lists.infradead.org Cc: linux-pm@vger.kernel.org Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: linux-gpio@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Zhang Rui <rui.zhang@intel.com> Cc: linux-media@vger.kernel.org Cc: Lee Jones <lee.jones@linaro.org>
95 lines
2.5 KiB
YAML
95 lines
2.5 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: UniPhier GPIO controller
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maintainers:
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- Masahiro Yamada <yamada.masahiro@socionext.com>
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properties:
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$nodename:
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pattern: "^gpio@[0-9a-f]+$"
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compatible:
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const: socionext,uniphier-gpio
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reg:
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maxItems: 1
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gpio-controller: true
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"#gpio-cells":
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const: 2
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interrupt-controller: true
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"#interrupt-cells":
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description: |
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The first cell defines the interrupt number.
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The second cell bits[3:0] is used to specify trigger type as follows:
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1 = low-to-high edge triggered
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2 = high-to-low edge triggered
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4 = active high level-sensitive
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8 = active low level-sensitive
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Valid combinations are 1, 2, 3, 4, 8.
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const: 2
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ngpios:
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minimum: 0
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maximum: 512
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gpio-ranges: true
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gpio-ranges-group-names:
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$ref: /schemas/types.yaml#/definitions/string-array
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socionext,interrupt-ranges:
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description: |
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Specifies an interrupt number mapping between this GPIO controller and
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its interrupt parent, in the form of arbitrary number of
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<child-interrupt-base parent-interrupt-base length> triplets.
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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required:
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- compatible
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- reg
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- gpio-controller
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- "#gpio-cells"
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- interrupt-controller
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- "#interrupt-cells"
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- ngpios
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- gpio-ranges
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- socionext,interrupt-ranges
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/gpio/uniphier-gpio.h>
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gpio: gpio@55000000 {
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compatible = "socionext,uniphier-gpio";
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reg = <0x55000000 0x200>;
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interrupt-parent = <&aidet>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl 0 0 0>;
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gpio-ranges-group-names = "gpio_range";
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ngpios = <248>;
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socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>;
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};
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// Consumer:
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// Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC
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// document. Unfortunately, only the one's place is octal in the port
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// numbering. (That is, PORT 8, 9, 18, 19, 28, 29, ... do not exist.)
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// UNIPHIER_GPIO_PORT() is a helper macro to calculate 29 * 8 + 4.
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sdhci0_pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>;
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};
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