linux/drivers/gpu
Ville Syrjälä 922044c9df drm/i915: Avoid div by zero when pixel clock is large
Make sure the line_time_us isn't zero in the gmch watermarks code as
that would cause a div by zero. This can be triggered by specifying
a very fast pixel clock for the mode.

At some point we should probably just switch over to using the same
math we use on PCH platforms which avoids such intermediate rounded
results.

Also we should verify the user provided mode much more rigorously.
At the moment we accept pretty much anything.

Note that "very fast mode" here means above 74.25 GHz.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Add Ville's clarification of what "very fast" means.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-07 22:36:58 +01:00
..
drm drm/i915: Avoid div by zero when pixel clock is large 2014-03-07 22:36:58 +01:00
host1x gpu: host1x: Remove unnecessary include 2014-01-14 14:39:45 +01:00
vga
Makefile