forked from Minki/linux
56cc2406d6
After commit77b0f5d(KVM: nVMX: Ack and write vector info to intr_info if L1 asks us to), "Acknowledge interrupt on exit" behavior can be emulated. To do so, KVM will ask the APIC for the interrupt vector if during a nested vmexit if VM_EXIT_ACK_INTR_ON_EXIT is set. With APICv, kvm_get_apic_interrupt would return -1 and give the following WARNING: Call Trace: [<ffffffff81493563>] dump_stack+0x49/0x5e [<ffffffff8103f0eb>] warn_slowpath_common+0x7c/0x96 [<ffffffffa059709a>] ? nested_vmx_vmexit+0xa4/0x233 [kvm_intel] [<ffffffff8103f11a>] warn_slowpath_null+0x15/0x17 [<ffffffffa059709a>] nested_vmx_vmexit+0xa4/0x233 [kvm_intel] [<ffffffffa0594295>] ? nested_vmx_exit_handled+0x6a/0x39e [kvm_intel] [<ffffffffa0537931>] ? kvm_apic_has_interrupt+0x80/0xd5 [kvm] [<ffffffffa05972ec>] vmx_check_nested_events+0xc3/0xd3 [kvm_intel] [<ffffffffa051ebe9>] inject_pending_event+0xd0/0x16e [kvm] [<ffffffffa051efa0>] vcpu_enter_guest+0x319/0x704 [kvm] To fix this, we cannot rely on the processor's virtual interrupt delivery, because "acknowledge interrupt on exit" must only update the virtual ISR/PPR/IRR registers (and SVI, which is just a cache of the virtual ISR) but it should not deliver the interrupt through the IDT. Thus, KVM has to deliver the interrupt "by hand", similar to the treatment of EOI in commitfc57ac2c9c(KVM: lapic: sync highest ISR to hardware apic on EOI, 2014-05-14). The patch modifies kvm_cpu_get_interrupt to always acknowledge an interrupt; there are only two callers, and the other is not affected because it is never reached with kvm_apic_vid_enabled() == true. Then it modifies apic_set_isr and apic_clear_irr to update SVI and RVI in addition to the registers. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Suggested-by: "Zhang, Yang Z" <yang.z.zhang@intel.com> Tested-by: Liu, RongrongX <rongrongx.liu@intel.com> Tested-by: Felipe Reyes <freyes@suse.com> Fixes:77b0f5d67fCc: stable@vger.kernel.org Signed-off-by: Wanpeng Li <wanpeng.li@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
130 lines
3.0 KiB
C
130 lines
3.0 KiB
C
/*
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* irq.c: API for in kernel interrupt controller
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* Copyright (c) 2007, Intel Corporation.
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* Copyright 2009 Red Hat, Inc. and/or its affiliates.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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* Authors:
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* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
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*
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*/
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#include <linux/module.h>
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#include <linux/kvm_host.h>
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#include "irq.h"
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#include "i8254.h"
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#include "x86.h"
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/*
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* check if there are pending timer events
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* to be processed.
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*/
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int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
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{
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return apic_has_pending_timer(vcpu);
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}
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EXPORT_SYMBOL(kvm_cpu_has_pending_timer);
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/*
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* check if there is pending interrupt from
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* non-APIC source without intack.
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*/
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static int kvm_cpu_has_extint(struct kvm_vcpu *v)
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{
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if (kvm_apic_accept_pic_intr(v))
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return pic_irqchip(v->kvm)->output; /* PIC */
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else
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return 0;
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}
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/*
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* check if there is injectable interrupt:
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* when virtual interrupt delivery enabled,
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* interrupt from apic will handled by hardware,
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* we don't need to check it here.
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*/
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int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v)
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{
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if (!irqchip_in_kernel(v->kvm))
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return v->arch.interrupt.pending;
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if (kvm_cpu_has_extint(v))
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return 1;
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if (kvm_apic_vid_enabled(v->kvm))
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return 0;
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return kvm_apic_has_interrupt(v) != -1; /* LAPIC */
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}
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/*
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* check if there is pending interrupt without
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* intack.
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*/
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int kvm_cpu_has_interrupt(struct kvm_vcpu *v)
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{
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if (!irqchip_in_kernel(v->kvm))
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return v->arch.interrupt.pending;
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if (kvm_cpu_has_extint(v))
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return 1;
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return kvm_apic_has_interrupt(v) != -1; /* LAPIC */
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}
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EXPORT_SYMBOL_GPL(kvm_cpu_has_interrupt);
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/*
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* Read pending interrupt(from non-APIC source)
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* vector and intack.
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*/
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static int kvm_cpu_get_extint(struct kvm_vcpu *v)
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{
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if (kvm_cpu_has_extint(v))
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return kvm_pic_read_irq(v->kvm); /* PIC */
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return -1;
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}
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/*
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* Read pending interrupt vector and intack.
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*/
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int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
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{
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int vector;
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if (!irqchip_in_kernel(v->kvm))
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return v->arch.interrupt.nr;
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vector = kvm_cpu_get_extint(v);
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if (vector != -1)
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return vector; /* PIC */
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return kvm_get_apic_interrupt(v); /* APIC */
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}
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EXPORT_SYMBOL_GPL(kvm_cpu_get_interrupt);
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void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu)
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{
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kvm_inject_apic_timer_irqs(vcpu);
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/* TODO: PIT, RTC etc. */
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}
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EXPORT_SYMBOL_GPL(kvm_inject_pending_timer_irqs);
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void __kvm_migrate_timers(struct kvm_vcpu *vcpu)
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{
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__kvm_migrate_apic_timer(vcpu);
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__kvm_migrate_pit_timer(vcpu);
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}
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