Ville Syrjälä 8e7a65aa70 drm/i915: Restore lost DPLL register write on gen2-4 ... We accidentally lost the initial DPLL register write in 1c4e027461 drm/i915: Fix DVO 2x clock enable on 830M The "three times for luck" hack probably saved us from a total disaster. But anyway, bring the initial write back so that the code actually makes some sense. Reported-and-tested-by: Nick Bowler <nbowler@draconx.ca> References: http://mid.gmane.org/CAN_QmVyMaArxYgEcVVsGvsMo7-6ohZr8HmF5VhkkL4i9KOmrhw@mail.gmail.com Cc: stable@vger.kernel.org Cc: Nick Bowler <nbowler@draconx.ca> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2015-10-13 17:03:18 +03:00
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drm	drm/i915: Restore lost DPLL register write on gen2-4	2015-10-13 17:03:18 +03:00
host1x	gpu: host1x: mipi: Power down regulators when unused	2015-08-13 13:47:21 +02:00
ipu-v3	gpu/drm: Kill off set_irq_flags usage	2015-09-16 16:53:38 +02:00
vga	vga_switcheroo: Remove unnecessary checks	2015-08-12 17:13:19 +02:00
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