forked from Minki/linux
f5e7e844a5
- Updates to mxc_nand and gpmi drivers to support new boards and device tree - Improve consistency of information about ECC strength in NAND devices - Clean up partition handling of plat_nand - Support NAND drivers without dedicated access to OOB area - BCH hardware ECC support for OMAP - Other fixes and cleanups, and a few new device IDs -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iEYEABECAAYFAk/JG1wACgkQdwG7hYl686M80wCglN4kutx20j+KJWuZofkr9Hog weEAoI4jrqEWEdW9EcT2CIWQw7eG+1v+ =7tdo -----END PGP SIGNATURE----- Merge tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd Pull mtd update from David Woodhouse: - More robust parsing especially of xattr data in JFFS2 - Updates to mxc_nand and gpmi drivers to support new boards and device tree - Improve consistency of information about ECC strength in NAND devices - Clean up partition handling of plat_nand - Support NAND drivers without dedicated access to OOB area - BCH hardware ECC support for OMAP - Other fixes and cleanups, and a few new device IDs Fixed trivial conflict in drivers/mtd/nand/gpmi-nand/gpmi-nand.c due to added include files next to each other. * tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd: (75 commits) mtd: mxc_nand: move ecc strengh setup before nand_scan_tail mtd: block2mtd: fix recursive call of mtd_writev mtd: gpmi-nand: define ecc.strength mtd: of_parts: fix breakage in Kconfig mtd: nand: fix scan_read_raw_oob mtd: docg3 fix in-middle of blocks reads mtd: cfi_cmdset_0002: Slight cleanup of fixup messages mtd: add fixup for S29NS512P NOR flash. jffs2: allow to complete xattr integrity check on first GC scan jffs2: allow to discriminate between recoverable and non-recoverable errors mtd: nand: omap: add support for hardware BCH ecc ARM: OMAP3: gpmc: add BCH ecc api and modes mtd: nand: check the return code of 'read_oob/read_oob_raw' mtd: nand: remove 'sndcmd' parameter of 'read_oob/read_oob_raw' mtd: m25p80: Add support for Winbond W25Q80BW jffs2: get rid of jffs2_sync_super jffs2: remove unnecessary GC pass on sync jffs2: remove unnecessary GC pass on umount jffs2: remove lock_super mtd: gpmi: add gpmi support for mx6q ...
435 lines
10 KiB
C
435 lines
10 KiB
C
/*
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* linux/arch/arm/mach-omap1/board-h2.c
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*
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* Board specific inits for OMAP-1610 H2
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*
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* Copyright (C) 2001 RidgeRun, Inc.
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* Author: Greg Lonnon <glonnon@ridgerun.com>
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*
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* Copyright (C) 2002 MontaVista Software, Inc.
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*
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* Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
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* Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
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*
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* H2 specific changes and cleanup
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* Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/input.h>
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#include <linux/i2c/tps65010.h>
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#include <linux/smc91x.h>
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#include <linux/omapfb.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <plat/mux.h>
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#include <plat/dma.h>
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#include <plat/tc.h>
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#include <plat/irda.h>
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#include <plat/usb.h>
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#include <plat/keypad.h>
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#include <plat/flash.h>
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#include <mach/hardware.h>
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#include "common.h"
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#include "board-h2.h"
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/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
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#define OMAP1610_ETHR_START 0x04000300
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static const unsigned int h2_keymap[] = {
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KEY(0, 0, KEY_LEFT),
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KEY(1, 0, KEY_RIGHT),
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KEY(2, 0, KEY_3),
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KEY(3, 0, KEY_F10),
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KEY(4, 0, KEY_F5),
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KEY(5, 0, KEY_9),
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KEY(0, 1, KEY_DOWN),
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KEY(1, 1, KEY_UP),
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KEY(2, 1, KEY_2),
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KEY(3, 1, KEY_F9),
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KEY(4, 1, KEY_F7),
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KEY(5, 1, KEY_0),
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KEY(0, 2, KEY_ENTER),
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KEY(1, 2, KEY_6),
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KEY(2, 2, KEY_1),
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KEY(3, 2, KEY_F2),
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KEY(4, 2, KEY_F6),
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KEY(5, 2, KEY_HOME),
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KEY(0, 3, KEY_8),
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KEY(1, 3, KEY_5),
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KEY(2, 3, KEY_F12),
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KEY(3, 3, KEY_F3),
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KEY(4, 3, KEY_F8),
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KEY(5, 3, KEY_END),
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KEY(0, 4, KEY_7),
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KEY(1, 4, KEY_4),
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KEY(2, 4, KEY_F11),
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KEY(3, 4, KEY_F1),
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KEY(4, 4, KEY_F4),
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KEY(5, 4, KEY_ESC),
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KEY(0, 5, KEY_F13),
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KEY(1, 5, KEY_F14),
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KEY(2, 5, KEY_F15),
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KEY(3, 5, KEY_F16),
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KEY(4, 5, KEY_SLEEP),
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};
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static struct mtd_partition h2_nor_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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{
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.name = "bootloader",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next sector */
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = 0,
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},
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/* kernel */
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0
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},
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/* file system */
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{
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0
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}
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};
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static struct physmap_flash_data h2_nor_data = {
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.width = 2,
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.set_vpp = omap1_set_vpp,
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.parts = h2_nor_partitions,
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.nr_parts = ARRAY_SIZE(h2_nor_partitions),
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};
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static struct resource h2_nor_resource = {
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/* This is on CS3, wherever it's mapped */
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device h2_nor_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &h2_nor_data,
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},
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.num_resources = 1,
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.resource = &h2_nor_resource,
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};
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static struct mtd_partition h2_nand_partitions[] = {
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#if 0
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/* REVISIT: enable these partitions if you make NAND BOOT
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* work on your H2 (rev C or newer); published versions of
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* x-load only support P2 and H3.
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*/
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{
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.name = "xloader",
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.offset = 0,
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.size = 64 * 1024,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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{
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.name = "bootloader",
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.offset = MTDPART_OFS_APPEND,
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.size = 256 * 1024,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = 192 * 1024,
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},
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = 2 * SZ_1M,
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},
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#endif
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{
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.name = "filesystem",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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},
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};
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#define H2_NAND_RB_GPIO_PIN 62
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static int h2_nand_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(H2_NAND_RB_GPIO_PIN);
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}
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static struct platform_nand_data h2_nand_platdata = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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.nr_partitions = ARRAY_SIZE(h2_nand_partitions),
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.partitions = h2_nand_partitions,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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},
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.ctrl = {
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.cmd_ctrl = omap1_nand_cmd_ctl,
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.dev_ready = h2_nand_dev_ready,
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},
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};
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static struct resource h2_nand_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device h2_nand_device = {
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.name = "gen_nand",
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.id = 0,
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.dev = {
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.platform_data = &h2_nand_platdata,
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},
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.num_resources = 1,
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.resource = &h2_nand_resource,
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};
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static struct smc91x_platdata h2_smc91x_info = {
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.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
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.leda = RPC_LED_100_10,
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.ledb = RPC_LED_TX_RX,
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};
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static struct resource h2_smc91x_resources[] = {
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[0] = {
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.start = OMAP1610_ETHR_START, /* Physical */
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.end = OMAP1610_ETHR_START + 0xf,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
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},
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};
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static struct platform_device h2_smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.dev = {
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.platform_data = &h2_smc91x_info,
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},
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.num_resources = ARRAY_SIZE(h2_smc91x_resources),
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.resource = h2_smc91x_resources,
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};
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static struct resource h2_kp_resources[] = {
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[0] = {
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.start = INT_KEYBOARD,
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.end = INT_KEYBOARD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static const struct matrix_keymap_data h2_keymap_data = {
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.keymap = h2_keymap,
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.keymap_size = ARRAY_SIZE(h2_keymap),
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};
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static struct omap_kp_platform_data h2_kp_data = {
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.rows = 8,
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.cols = 8,
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.keymap_data = &h2_keymap_data,
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.rep = true,
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.delay = 9,
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.dbounce = true,
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};
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static struct platform_device h2_kp_device = {
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.name = "omap-keypad",
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.id = -1,
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.dev = {
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.platform_data = &h2_kp_data,
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},
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.num_resources = ARRAY_SIZE(h2_kp_resources),
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.resource = h2_kp_resources,
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};
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#define H2_IRDA_FIRSEL_GPIO_PIN 17
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static struct omap_irda_config h2_irda_data = {
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.transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
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.rx_channel = OMAP_DMA_UART3_RX,
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.tx_channel = OMAP_DMA_UART3_TX,
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.dest_start = UART3_THR,
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.src_start = UART3_RHR,
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.tx_trigger = 0,
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.rx_trigger = 0,
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};
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static struct resource h2_irda_resources[] = {
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[0] = {
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.start = INT_UART3,
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.end = INT_UART3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 irda_dmamask = 0xffffffff;
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static struct platform_device h2_irda_device = {
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.name = "omapirda",
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.id = 0,
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.dev = {
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.platform_data = &h2_irda_data,
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.dma_mask = &irda_dmamask,
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},
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.num_resources = ARRAY_SIZE(h2_irda_resources),
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.resource = h2_irda_resources,
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};
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static struct platform_device *h2_devices[] __initdata = {
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&h2_nor_device,
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&h2_nand_device,
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&h2_smc91x_device,
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&h2_irda_device,
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&h2_kp_device,
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};
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static void __init h2_init_smc91x(void)
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{
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if (gpio_request(0, "SMC91x irq") < 0) {
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printk("Error requesting gpio 0 for smc91x irq\n");
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return;
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}
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}
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static int tps_setup(struct i2c_client *client, void *context)
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{
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tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
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TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
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return 0;
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}
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static struct tps65010_board tps_board = {
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.base = H2_TPS_GPIO_BASE,
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.outmask = 0x0f,
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.setup = tps_setup,
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};
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static struct i2c_board_info __initdata h2_i2c_board_info[] = {
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{
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I2C_BOARD_INFO("tps65010", 0x48),
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.platform_data = &tps_board,
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}, {
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I2C_BOARD_INFO("isp1301_omap", 0x2d),
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},
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};
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static struct omap_usb_config h2_usb_config __initdata = {
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/* usb1 has a Mini-AB port and external isp1301 transceiver */
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.otg = 2,
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#ifdef CONFIG_USB_GADGET_OMAP
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.hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
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/* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
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#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
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/* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
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.hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
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#endif
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.pins[1] = 3,
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};
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static struct omap_lcd_config h2_lcd_config __initdata = {
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.ctrl_name = "internal",
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};
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static void __init h2_init(void)
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{
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h2_init_smc91x();
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/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
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* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
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* notice whether a NAND chip is enabled at probe time.
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*
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* FIXME revC boards (and H3) support NAND-boot, with a dip switch to
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* put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
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* detecting that in code here, to avoid probing every possible flash
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* configuration...
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*/
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h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
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h2_nor_resource.end += SZ_32M - 1;
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h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
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h2_nand_resource.end += SZ_4K - 1;
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if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
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BUG();
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gpio_direction_input(H2_NAND_RB_GPIO_PIN);
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omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
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omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
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/* MMC: card detect and WP */
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/* omap_cfg_reg(U19_ARMIO1); */ /* CD */
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omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
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/* Mux pins for keypad */
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omap_cfg_reg(F18_1610_KBC0);
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omap_cfg_reg(D20_1610_KBC1);
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omap_cfg_reg(D19_1610_KBC2);
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omap_cfg_reg(E18_1610_KBC3);
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omap_cfg_reg(C21_1610_KBC4);
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omap_cfg_reg(G18_1610_KBR0);
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omap_cfg_reg(F19_1610_KBR1);
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omap_cfg_reg(H14_1610_KBR2);
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omap_cfg_reg(E20_1610_KBR3);
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omap_cfg_reg(E19_1610_KBR4);
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omap_cfg_reg(N19_1610_KBR5);
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h2_smc91x_resources[1].start = gpio_to_irq(0);
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h2_smc91x_resources[1].end = gpio_to_irq(0);
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platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
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omap_serial_init();
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h2_i2c_board_info[0].irq = gpio_to_irq(58);
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h2_i2c_board_info[1].irq = gpio_to_irq(2);
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omap_register_i2c_bus(1, 100, h2_i2c_board_info,
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ARRAY_SIZE(h2_i2c_board_info));
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omap1_usb_init(&h2_usb_config);
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h2_mmc_init();
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omapfb_set_lcd_config(&h2_lcd_config);
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}
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MACHINE_START(OMAP_H2, "TI-H2")
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/* Maintainer: Imre Deak <imre.deak@nokia.com> */
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.atag_offset = 0x100,
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.map_io = omap16xx_map_io,
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.init_early = omap1_init_early,
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.reserve = omap_reserve,
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.init_irq = omap1_init_irq,
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.init_machine = h2_init,
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.init_late = omap1_init_late,
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.timer = &omap1_timer,
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.restart = omap1_restart,
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MACHINE_END
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