forked from Minki/linux
6da314122d
The DT branch adds a lot of new stuff for additional SoC and board support. The branch is the largest one and contains 513 out of the total 972 non-merge arm-soc changesets for 3.19. Most of the changes are about enabling additional on-chip devices for existing machines, but there are also an unusual number of new SoC types being added this time: * AMLogic Meson8 * ARM Realview in DT mode * Allwinner A80 * Broadcom BCM47081 * Broadcom Cygnus * Freescale LS1021A * Freescale Vybrid 500 series * Mediatek MT6592, MT8127, MT8135 * STMicroelectronics STiH410 * Samsung Exynos4415 The level of support for the above differs widely, some are just stubs with nothing more than CPU, memory and a UART, but others are fairly complete. As usual, these get extended over time. There are also many new boards getting added, this is the list of model strings that are showing up in new dts files: * ARM RealView PB1176 * Altera SOCFPGA Arria 10 * Asus RT-N18U (BCM47081) * Buffalo WZR-1750DHP (BCM4708) * Buffalo WZR-600DHP2 (BCM47081) * Cygnus Enterprise Phone (BCM911360_ENTPHN) * D-Link DIR-665 * Google Spring * IGEP COM MODULE Rev. G (TI OMAP AM/DM37x) * IGEPv2 Rev. F (TI OMAP AM/DM37x) * LS1021A QDS Board * LS1021A TWR Board * LeMaker Banana Pi * MarsBoard RK3066 * MediaTek MT8127 Moose Board * MediaTek MT8135 evaluation board * Mele M3 * Merrii A80 Optimus Board * Netgear R6300 V2 (BCM4708) * Nomadik STN8815NHK * NovaTech OrionLXm * Olimex A20-OLinuXino-LIME2 * Raspberry Pi Model B+ * STiH410 B2120 * Samsung Monk board * Samsung Rinato board * Synology DS213j * Synology DS414 * TBS2910 Matrix ARM mini PC * TI AM5728 BeagleBoard-X15 * Toradex Colibri VF50 on Colibri Evaluation Board * Zynq ZYBO Development Board Other notable changes include: * exynos: cleanup of existing dts files * mvebu: improved pinctrl support for Armada 370/XP * nomadik: restructuring dts files * omap: added CAN bus support * shmobile: added clock support for some SoCs * shmobile: added sound support for some SoCs * sirf: reset controller support * sunxi: continuing the relicensing under dual GPL/MIT * sunxi: lots of new on-chip device support * sunxi: working simplefb support (long awaited) * various: provide stdout-path property for earlycon -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAVIcj3mCrR//JCVInAQL9Nw//YKK1l5gDZMmJ5nZXapXaZXERACN1n7H6 9kkEZRF5ndUY4+MQmqYqHqBya04aQgnuHu0hsxbEAn2L3j2+ejZgc8XRqflArORy EXQvH/l6UNA11aCoLvKvT9fny76ZCOyEOALWXj9oLxhfd5X2d/So9q1ELFLgmc0S XnVMfpoXPeVPhe6l8EhF/qI0xYjM91CHWRopRQi6yp4DqFXV2+h5ggCpX1+S2e8L LyGNLk0RM9Mha+Qyy4O+LY+FoeWwDutQyat0ct9ov6FP8AYrR1N43d/ekJ57L8fU hVymo+5prUwEkIfQpsJQjPzonJxFssk1KD9t+GZ99VgEO02tvpjeB0nwoaWJxS25 MzU2Bgp0Z/Yu0Q0SGu5/fuMya1Mo+wRA1OyQLp515TQqdWyTLcPT9o/ahfw8Uf1W 6gBZoB+XXEQPI1sMHDDrn4r5T9mySsodAGfnvJoNxttnjCmVRzI5sXssnFji8TTF ciMEzfoTJNPqzxkzaOM13XmslKtFrI9A+DGgnOWn6oZXODzHcc6M+z/moiWy8b/e /HsbzWvp9HUPZVjM2AJR4iiyLXv7GRu9maNmGtoXKi9bnQDaNGWFovp/R5y8avQM xyzJ+6melNZnnoEue8/OOdum7jMeqPCRVQuqM2hKVcsmNEnb7kPBOi4AYXWTrTFO bcDvFylnmlA= =BHwA -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Arnd Bergmann: "The DT branch adds a lot of new stuff for additional SoC and board support. The branch is the largest one and contains 513 out of the total 972 non-merge arm-soc changesets for 3.19. Most of the changes are about enabling additional on-chip devices for existing machines, but there are also an unusual number of new SoC types being added this time: - AMLogic Meson8 - ARM Realview in DT mode - Allwinner A80 - Broadcom BCM47081 - Broadcom Cygnus - Freescale LS1021A - Freescale Vybrid 500 series - Mediatek MT6592, MT8127, MT8135 - STMicroelectronics STiH410 - Samsung Exynos4415 The level of support for the above differs widely, some are just stubs with nothing more than CPU, memory and a UART, but others are fairly complete. As usual, these get extended over time. There are also many new boards getting added, this is the list of model strings that are showing up in new dts files: - ARM RealView PB1176 - Altera SOCFPGA Arria 10 - Asus RT-N18U (BCM47081) - Buffalo WZR-1750DHP (BCM4708) - Buffalo WZR-600DHP2 (BCM47081) - Cygnus Enterprise Phone (BCM911360_ENTPHN) - D-Link DIR-665 - Google Spring - IGEP COM MODULE Rev. G (TI OMAP AM/DM37x) - IGEPv2 Rev. F (TI OMAP AM/DM37x) - LS1021A QDS Board - LS1021A TWR Board - LeMaker Banana Pi - MarsBoard RK3066 - MediaTek MT8127 Moose Board - MediaTek MT8135 evaluation board - Mele M3 - Merrii A80 Optimus Board - Netgear R6300 V2 (BCM4708) - Nomadik STN8815NHK - NovaTech OrionLXm - Olimex A20-OLinuXino-LIME2 - Raspberry Pi Model B+ - STiH410 B2120 - Samsung Monk board - Samsung Rinato board - Synology DS213j - Synology DS414 - TBS2910 Matrix ARM mini PC - TI AM5728 BeagleBoard-X15 - Toradex Colibri VF50 on Colibri Evaluation Board - Zynq ZYBO Development Board Other notable changes include: - exynos: cleanup of existing dts files - mvebu: improved pinctrl support for Armada 370/XP - nomadik: restructuring dts files - omap: added CAN bus support - shmobile: added clock support for some SoCs - shmobile: added sound support for some SoCs - sirf: reset controller support - sunxi: continuing the relicensing under dual GPL/MIT - sunxi: lots of new on-chip device support - sunxi: working simplefb support (long awaited) - various: provide stdout-path property for earlycon" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (510 commits) ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured Revert "ARM: dts: rockchip: temporarily disable smp on rk3288" ARM: BCM5301X: Add DT for Buffalo WZR-600DHP2 ARM: BCM5301X: Add DT for Asus RT-N18U ARM: BCM5301X: Add DT for Buffalo WZR-1750DHP ARM: BCM5301X: Add DT for Netgear R6300 V2 ARM: BCM5301X: Add buttons for Netgear R6250 ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file arm: dts: zynq: Add Digilent ZYBO board arm: dts: zynq: Move crystal freq. to board level doc: dt: vendor-prefixes: Add Digilent Inc Documentation: devicetree: Fix Xilinx VDMA specification ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188 ARM: dts: rockchip: add label property for leds on Radxa Rock ARM: BCM5301X: Add LEDs for Netgear R6250 V1 ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file ARM: dts: add sysreg phandle to i2c device nodes for exynos ARM: dts: Remove unused bootargs from exynos3250-rinato ARM: dts: add board dts file for Exynos3250-based Monk board ...
585 lines
12 KiB
Plaintext
585 lines
12 KiB
Plaintext
/*
|
|
* Copyright 2012 Freescale Semiconductor, Inc.
|
|
* Copyright 2011 Linaro Ltd.
|
|
*
|
|
* The code contained herein is licensed under the GNU General Public
|
|
* License. You may obtain a copy of the GNU General Public License
|
|
* Version 2 or later at the following locations:
|
|
*
|
|
* http://www.opensource.org/licenses/gpl-license.html
|
|
* http://www.gnu.org/copyleft/gpl.html
|
|
*/
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
chosen {
|
|
stdout-path = &uart1;
|
|
};
|
|
|
|
memory {
|
|
reg = <0x10000000 0x40000000>;
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
reg_usb_otg_vbus: regulator@0 {
|
|
compatible = "regulator-fixed";
|
|
reg = <0>;
|
|
regulator-name = "usb_otg_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio3 22 0>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_usb_h1_vbus: regulator@1 {
|
|
compatible = "regulator-fixed";
|
|
reg = <1>;
|
|
regulator-name = "usb_h1_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio1 29 0>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_audio: regulator@2 {
|
|
compatible = "regulator-fixed";
|
|
reg = <2>;
|
|
regulator-name = "wm8962-supply";
|
|
gpio = <&gpio4 10 0>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_pcie: regulator@3 {
|
|
compatible = "regulator-fixed";
|
|
reg = <3>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie_reg>;
|
|
regulator-name = "MPCIE_3V3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio3 19 0>;
|
|
regulator-always-on;
|
|
enable-active-high;
|
|
};
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpio_keys>;
|
|
|
|
power {
|
|
label = "Power Button";
|
|
gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
|
|
gpio-key,wakeup;
|
|
linux,code = <KEY_POWER>;
|
|
};
|
|
|
|
volume-up {
|
|
label = "Volume Up";
|
|
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
|
gpio-key,wakeup;
|
|
linux,code = <KEY_VOLUMEUP>;
|
|
};
|
|
|
|
volume-down {
|
|
label = "Volume Down";
|
|
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
|
|
gpio-key,wakeup;
|
|
linux,code = <KEY_VOLUMEDOWN>;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "fsl,imx6q-sabresd-wm8962",
|
|
"fsl,imx-audio-wm8962";
|
|
model = "wm8962-audio";
|
|
ssi-controller = <&ssi2>;
|
|
audio-codec = <&codec>;
|
|
audio-routing =
|
|
"Headphone Jack", "HPOUTL",
|
|
"Headphone Jack", "HPOUTR",
|
|
"Ext Spk", "SPKOUTL",
|
|
"Ext Spk", "SPKOUTR",
|
|
"AMIC", "MICBIAS",
|
|
"IN3R", "AMIC";
|
|
mux-int-port = <2>;
|
|
mux-ext-port = <3>;
|
|
};
|
|
|
|
backlight {
|
|
compatible = "pwm-backlight";
|
|
pwms = <&pwm1 0 5000000>;
|
|
brightness-levels = <0 4 8 16 32 64 128 255>;
|
|
default-brightness-level = <7>;
|
|
status = "okay";
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpio_leds>;
|
|
|
|
red {
|
|
gpios = <&gpio1 2 0>;
|
|
default-state = "on";
|
|
};
|
|
};
|
|
};
|
|
|
|
&audmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_audmux>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ecspi1 {
|
|
fsl,spi-num-chipselects = <1>;
|
|
cs-gpios = <&gpio4 9 0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ecspi1>;
|
|
status = "okay";
|
|
|
|
flash: m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "st,m25p32";
|
|
spi-max-frequency = <20000000>;
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_enet>;
|
|
phy-mode = "rgmii";
|
|
phy-reset-gpios = <&gpio1 25 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&hdmi {
|
|
ddc-i2c-bus = <&i2c2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
status = "okay";
|
|
|
|
codec: wm8962@1a {
|
|
compatible = "wlf,wm8962";
|
|
reg = <0x1a>;
|
|
clocks = <&clks IMX6QDL_CLK_CKO>;
|
|
DCVDD-supply = <®_audio>;
|
|
DBVDD-supply = <®_audio>;
|
|
AVDD-supply = <®_audio>;
|
|
CPVDD-supply = <®_audio>;
|
|
MICVDD-supply = <®_audio>;
|
|
PLLVDD-supply = <®_audio>;
|
|
SPKVDD1-supply = <®_audio>;
|
|
SPKVDD2-supply = <®_audio>;
|
|
gpio-cfg = <
|
|
0x0000 /* 0:Default */
|
|
0x0000 /* 1:Default */
|
|
0x0013 /* 2:FN_DMICCLK */
|
|
0x0000 /* 3:Default */
|
|
0x8014 /* 4:FN_DMICCDAT */
|
|
0x0000 /* 5:Default */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
status = "okay";
|
|
|
|
pmic: pfuze100@08 {
|
|
compatible = "fsl,pfuze100";
|
|
reg = <0x08>;
|
|
|
|
regulators {
|
|
sw1a_reg: sw1ab {
|
|
regulator-min-microvolt = <300000>;
|
|
regulator-max-microvolt = <1875000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-ramp-delay = <6250>;
|
|
};
|
|
|
|
sw1c_reg: sw1c {
|
|
regulator-min-microvolt = <300000>;
|
|
regulator-max-microvolt = <1875000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-ramp-delay = <6250>;
|
|
};
|
|
|
|
sw2_reg: sw2 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sw3a_reg: sw3a {
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <1975000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sw3b_reg: sw3b {
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <1975000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sw4_reg: sw4 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
swbst_reg: swbst {
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5150000>;
|
|
};
|
|
|
|
snvs_reg: vsnvs {
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vref_reg: vrefddr {
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vgen1_reg: vgen1 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1550000>;
|
|
};
|
|
|
|
vgen2_reg: vgen2 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1550000>;
|
|
};
|
|
|
|
vgen3_reg: vgen3 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
vgen4_reg: vgen4 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vgen5_reg: vgen5 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vgen6_reg: vgen6 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
|
status = "okay";
|
|
|
|
egalax_ts@04 {
|
|
compatible = "eeti,egalax_ts";
|
|
reg = <0x04>;
|
|
interrupt-parent = <&gpio6>;
|
|
interrupts = <7 2>;
|
|
wakeup-gpios = <&gpio6 7 0>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
imx6qdl-sabresd {
|
|
pinctrl_hog: hoggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
|
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
|
|
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
|
|
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
|
|
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
|
|
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
|
|
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
|
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
|
|
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
|
|
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
|
|
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_enet: enetgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpio_keys: gpio_keysgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
|
|
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
|
|
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pcie: pciegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pcie_reg: pciereggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm1: pwm1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
|
MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
|
|
MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
|
|
MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
|
|
MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
|
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
|
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
|
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc4: usdhc4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
|
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
|
|
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
|
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
|
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
|
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
|
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
|
|
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
|
|
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
|
|
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
|
|
>;
|
|
};
|
|
};
|
|
|
|
gpio_leds {
|
|
pinctrl_gpio_leds: gpioledsgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ldb {
|
|
status = "okay";
|
|
|
|
lvds-channel@1 {
|
|
fsl,data-mapping = "spwg";
|
|
fsl,data-width = <18>;
|
|
status = "okay";
|
|
|
|
display-timings {
|
|
native-mode = <&timing0>;
|
|
timing0: hsd100pxn1 {
|
|
clock-frequency = <65000000>;
|
|
hactive = <1024>;
|
|
vactive = <768>;
|
|
hback-porch = <220>;
|
|
hfront-porch = <40>;
|
|
vback-porch = <21>;
|
|
vfront-porch = <7>;
|
|
hsync-len = <60>;
|
|
vsync-len = <10>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie>;
|
|
reset-gpio = <&gpio7 12 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&snvs_poweroff {
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
vbus-supply = <®_usb_h1_vbus>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
bus-width = <8>;
|
|
cd-gpios = <&gpio2 2 0>;
|
|
wp-gpios = <&gpio2 3 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
bus-width = <8>;
|
|
cd-gpios = <&gpio2 0 0>;
|
|
wp-gpios = <&gpio2 1 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc4>;
|
|
bus-width = <8>;
|
|
non-removable;
|
|
no-1-8-v;
|
|
status = "okay";
|
|
};
|