linux/arch/mips
Chris Packham 82eb8f7342 MIPS: Use unsigned int when reading CP0 registers
Update __read_32bit_c0_register() and __read_32bit_c0_ctrl_register() to
use "unsigned int res;" instead of "int res;". There is little reason to
treat these register values as signed. They are either counters (which
by definition are unsigned) or are made up of various bit fields to be
interpreted as per the CPU datasheet.

This has come up via u-boot[1] which sync's asm/mipsregs.h with the
kernel. In u-boots case the value read from read_c0_count() is assigned
to an unsigned long [2] which triggers a sign extension and causes a
bug.

U-boot should probably be more explicit about the types used for the
timer_read_counter() API but that aside is there any reason to treat
these values as signed integers? A quick grep around the arch/mips makes
me thing that there may be some bugs lurking when read_c0_count() starts
to yield a negative value but I haven't really explored any of them.

[1] - http://lists.denx.de/pipermail/u-boot/2015-July/219086.html
[2] - http://git.denx.de/?p=u-boot.git;a=blob;f=arch/mips/cpu/time.c#l11

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Chris Packham <judge.packham@gmail.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10718/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-09-03 12:07:41 +02:00
..
alchemy MIPS: alchemy: Remove pointless irqdisable/enable 2015-08-26 15:23:30 +02:00
ar7 MIPS: AR7: Replace mac address parsing 2015-04-02 13:54:22 +02:00
ath25 Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2015-07-01 15:19:35 -07:00
ath79 MIPS: ath91: Remove pointless irqdisable/enable 2015-08-26 15:23:31 +02:00
bcm47xx MIPS: BCM47xx: Simplify handling SPROM revisions 2015-06-21 22:19:59 +02:00
bcm63xx MIPS: bcm63xx: Use irq_set_handler_locked() 2015-08-26 15:23:29 +02:00
bmips MIPS: BMIPS: Accept UHI interface for passing a dtb 2015-06-21 21:54:17 +02:00
boot MIPS: Malta: Basic DT plumbing 2015-06-21 21:54:29 +02:00
cavium-octeon MIPS: octeon: Replace the homebrewn flow handler 2015-08-26 15:23:32 +02:00
cobalt MIPS: Cobalt Don't use module_init in non-modular MTD registration. 2015-06-21 22:14:30 +02:00
configs MIPS: Loongson: Naming style cleanup and rework 2015-06-21 21:53:59 +02:00
dec MIPS: DEC: Do not set up the FPU interrupt if no FPU 2015-04-08 01:10:46 +02:00
emma
fw MIPS: ARC: Use __noreturn / unreachable in ARC termination functions. 2015-01-13 16:04:27 +01:00
include MIPS: Use unsigned int when reading CP0 registers 2015-09-03 12:07:41 +02:00
jazz
jz4740 MIPS: jz4740: Consolidate chained IRQ handler install/remove 2015-08-26 15:23:23 +02:00
kernel MIPS: MSA unaligned memory access support 2015-09-03 12:07:40 +02:00
kvm The bulk of the changes here is for x86. And for once it's not 2015-06-24 09:36:49 -07:00
lantiq MIPS: Export get_c0_perfcount_int() 2015-08-03 09:25:18 +02:00
lasat Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 2015-04-17 15:50:54 -04:00
lib MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init' 2015-06-21 21:52:41 +02:00
loongson32 MIPS: Loongson: Naming style cleanup and rework 2015-06-21 21:53:59 +02:00
loongson64 MIPS: SMP: Don't increment irq_count multiple times for call function IPIs 2015-08-03 09:25:12 +02:00
math-emu MIPS: Fix erroneous JR emulation for MIPS R6 2015-07-09 11:11:43 +02:00
mm MIPS: mm: default platform_maar_init using bootmem data 2015-09-03 12:07:40 +02:00
mti-malta MIPS: malta: Use generic platform_maar_init 2015-09-03 12:07:41 +02:00
mti-sead3 MIPS: Export get_c0_perfcount_int() 2015-08-03 09:25:18 +02:00
net MIPS: BPF: Introduce BPF ASM helpers 2015-06-21 21:54:25 +02:00
netlogic MIPS: netlogic: Prepare ipi handlers for irq argument removal 2015-08-26 15:23:33 +02:00
oprofile MIPS: Add cases for CPU_I6400 2015-08-26 15:23:03 +02:00
paravirt MIPS: SMP: Don't increment irq_count multiple times for call function IPIs 2015-08-03 09:25:12 +02:00
pci MIPS: ops-emma2rh: Drop nonsensical db_assert 2015-08-26 15:23:35 +02:00
pistachio MIPS: Export get_c0_perfcount_int() 2015-08-03 09:25:18 +02:00
pmcs-msp71xx MIPS: irq: Use access helper irq_data_get_affinity_mask() 2015-08-26 15:23:28 +02:00
pnx833x
power MIPS: Hibernate: flush TLB entries earlier 2015-04-10 15:41:52 +02:00
ralink MIPS: Export get_c0_perfcount_int() 2015-08-03 09:25:18 +02:00
rb532 MIPS: Replace use of phys_t with phys_addr_t. 2014-11-24 22:47:31 +01:00
sgi-ip22 MIPS: ip22-gio: Remove legacy suspend/resume support 2015-02-20 13:30:55 +01:00
sgi-ip27 MIPS: SMP: Don't increment irq_count multiple times for call function IPIs 2015-08-03 09:25:12 +02:00
sgi-ip32 MIPS: IP32: Fix build errors in reset code in DS1685 platform hook. 2015-05-13 00:01:41 +02:00
sibyte MIPS: SMP: Don't increment irq_count multiple times for call function IPIs 2015-08-03 09:25:12 +02:00
sni
txx9 MIPS/IRQCHIP: Move irq_chip from arch/mips to drivers/irqchip. 2015-06-21 21:52:50 +02:00
vr41xx MIPS/IRQCHIP: Move irq_chip from arch/mips to drivers/irqchip. 2015-06-21 21:52:50 +02:00
Kbuild
Kbuild.platforms MIPS: Loongson: Naming style cleanup and rework 2015-06-21 21:53:59 +02:00
Kconfig MIPS: Kconfig: Disable MIPS MT and SMP implementations for R6 2015-08-26 15:23:05 +02:00
Kconfig.debug MIPS: Drop CONFIG_RUNTIME_DEBUG & debug.h 2015-08-26 15:23:36 +02:00
Makefile MIPS: SB1: Remove support for Pass 1 parts. 2015-07-14 21:47:34 +02:00