forked from Minki/linux
13283626c8
The license text has been mangled at some point then copy pasted across multiple files. Restore it to what it should be. Note that this is not intended as a license change. Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Afzal Mohammed <afzal.mohd.ma@gmail.com> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
709 lines
18 KiB
Plaintext
709 lines
18 KiB
Plaintext
/*
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* Copyright (C) 2016 Boundary Devices, Inc.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "imx6sx.dtsi"
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/ {
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model = "Boundary Devices i.MX6 SoloX Nitrogen6sx Board";
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compatible = "boundary,imx6sx-nitrogen6sx", "fsl,imx6sx";
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aliases {
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fb_lcd = &lcdif1;
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t_lcd = &t_lcd;
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};
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memory {
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reg = <0x80000000 0x40000000>;
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};
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backlight-lvds {
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compatible = "pwm-backlight";
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pwms = <&pwm4 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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power-supply = <®_3p3v>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_can1_3v3: regulator-can1-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "can1-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio4 27 GPIO_ACTIVE_LOW>;
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};
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reg_can2_3v3: regulator-can2-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "can2-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio4 24 GPIO_ACTIVE_LOW>;
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};
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reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1_vbus>;
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compatible = "regulator-fixed";
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regulator-name = "usb_otg1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_wlan: regulator-wlan {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_wlan>;
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compatible = "regulator-fixed";
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clocks = <&clks IMX6SX_CLK_CKO>;
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clock-names = "slow";
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regulator-name = "wlan-en";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <70000>;
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gpio = <&gpio7 6 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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sound {
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compatible = "fsl,imx-audio-sgtl5000";
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model = "imx6sx-nitrogen6sx-sgtl5000";
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cpu-dai = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <5>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&ecspi1 {
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cs-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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flash: m25p80@0 {
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compatible = "microchip,sst25vf016b";
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spi-max-frequency = <20000000>;
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "U-Boot";
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reg = <0x0 0xc0000>;
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read-only;
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};
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partition@c0000 {
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label = "env";
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reg = <0xc0000 0x2000>;
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read-only;
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};
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partition@c2000 {
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label = "Kernel";
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reg = <0xc2000 0x11e000>;
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};
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partition@1e0000 {
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label = "M4";
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reg = <0x1e0000 0x20000>;
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};
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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phy-mode = "rgmii";
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phy-handle = <ðphy1>;
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phy-supply = <®_3p3v>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@4 {
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reg = <4>;
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};
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ethphy2: ethernet-phy@5 {
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reg = <5>;
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};
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};
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};
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&fec2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet2>;
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phy-mode = "rgmii";
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phy-handle = <ðphy2>;
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phy-supply = <®_3p3v>;
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fsl,magic-packet;
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status = "okay";
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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xceiver-supply = <®_can1_3v3>;
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status = "okay";
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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xceiver-supply = <®_can2_3v3>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sgtl5000>;
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reg = <0x0a>;
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clocks = <&clks IMX6SX_CLK_CKO2>;
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VDDA-supply = <®_1p8v>;
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VDDIO-supply = <®_1p8v>;
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VDDD-supply = <®_1p8v>;
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assigned-clocks = <&clks IMX6SX_CLK_CKO2_SEL>,
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<&clks IMX6SX_CLK_CKO2>;
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assigned-clock-parents = <&clks IMX6SX_CLK_OSC>;
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assigned-clock-rates = <0>, <24000000>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&lcdif1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcdif1>;
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lcd-supply = <®_3p3v>;
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display = <&display0>;
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status = "okay";
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display0: display0 {
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bits-per-pixel = <16>;
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bus-width = <24>;
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display-timings {
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native-mode = <&t_lcd>;
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t_lcd: t_lcd_default {
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clock-frequency = <74160000>;
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hactive = <1280>;
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vactive = <720>;
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hback-porch = <220>;
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hfront-porch = <110>;
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vback-porch = <20>;
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vfront-porch = <5>;
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hsync-len = <40>;
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vsync-len = <5>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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reset-gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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status = "okay";
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};
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&ssi1 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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uart-has-rtscts;
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status = "okay";
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};
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&uart5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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status = "okay";
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};
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&usbotg1 {
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vbus-supply = <®_usb_otg1_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1>;
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status = "okay";
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};
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&usbotg2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg2>;
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dr_mode = "host";
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disable-over-current;
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reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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bus-width = <4>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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keep-power-in-suspend;
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wakeup-source;
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status = "okay";
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};
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&usdhc3 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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bus-width = <4>;
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non-removable;
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keep-power-in-suspend;
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vmmc-supply = <®_wlan>;
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cap-power-off-card;
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cap-sdio-irq;
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status = "okay";
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brcmf: bcrmf@1 {
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reg = <1>;
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compatible = "brcm,bcm4329-fmac";
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interrupt-parent = <&gpio7>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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};
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wlcore: wlcore@2 {
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compatible = "ti,wl1271";
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reg = <2>;
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interrupt-parent = <&gpio7>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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ref-clock-frequency = <38400000>;
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};
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};
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&usdhc4 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc4_50mhz>;
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pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
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bus-width = <8>;
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non-removable;
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vmmc-supply = <®_1p8v>;
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keep-power-in-suspend;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6SX_PAD_SD1_DATA0__AUDMUX_AUD5_RXD 0x1b0b0
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MX6SX_PAD_SD1_DATA1__AUDMUX_AUD5_TXC 0x1b0b0
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MX6SX_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS 0x1b0b0
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MX6SX_PAD_SD1_DATA3__AUDMUX_AUD5_TXD 0x1b0b0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6SX_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
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MX6SX_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
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MX6SX_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
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MX6SX_PAD_KEY_ROW1__GPIO2_IO_16 0x0b0b1
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>;
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};
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0x1b0b0
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MX6SX_PAD_ENET1_MDC__ENET1_MDC 0x1b0b0
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MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0x30b1
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MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0x30b1
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MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0x30b1
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MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0x30b1
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MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0x30b1
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MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0x30b1
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MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
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MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
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MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
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MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
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MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
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MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
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MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 0xb0b0
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MX6SX_PAD_ENET1_RX_CLK__GPIO2_IO_4 0xb0b0
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MX6SX_PAD_ENET1_TX_CLK__GPIO2_IO_5 0xb0b0
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>;
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};
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pinctrl_enet2: enet2grp {
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fsl,pins = <
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MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0x30b1
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MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0x30b1
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MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0x30b1
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MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0x30b1
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MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0x30b1
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MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0x30b1
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MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
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MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
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MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
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MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
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MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
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MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
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MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0xb0b0
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MX6SX_PAD_ENET2_RX_CLK__GPIO2_IO_8 0xb0b0
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MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0xb0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_flexcan1: flexcan1grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b0b0
|
|
MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b0b0
|
|
MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27 0x1b0b0
|
|
MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27 0x0b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_flexcan2: flexcan2grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b0b0
|
|
MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b0b0
|
|
MX6SX_PAD_QSPI1B_DATA0__GPIO4_IO_24 0x0b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_hog: hoggrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_NAND_CE0_B__GPIO4_IO_1 0x1b0b0
|
|
MX6SX_PAD_NAND_CLE__GPIO4_IO_3 0x1b0b0
|
|
MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x1b0b0
|
|
MX6SX_PAD_NAND_WE_B__GPIO4_IO_14 0x1b0b0
|
|
MX6SX_PAD_NAND_WP_B__GPIO4_IO_15 0x1b0b0
|
|
MX6SX_PAD_NAND_READY_B__GPIO4_IO_13 0x1b0b0
|
|
MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x1b0b0
|
|
MX6SX_PAD_QSPI1A_DATA1__GPIO4_IO_17 0x1b0b0
|
|
MX6SX_PAD_QSPI1A_DATA2__GPIO4_IO_18 0x1b0b0
|
|
MX6SX_PAD_QSPI1A_DATA3__GPIO4_IO_19 0x1b0b0
|
|
MX6SX_PAD_SD1_CMD__CCM_CLKO1 0x000b0
|
|
MX6SX_PAD_SD3_DATA5__GPIO7_IO_7 0x1b0b0
|
|
/* Test points */
|
|
MX6SX_PAD_NAND_DATA04__GPIO4_IO_8 0x1b0b0
|
|
MX6SX_PAD_QSPI1B_DATA1__GPIO4_IO_25 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1
|
|
MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1
|
|
MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
|
|
MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_lcdif1: lcdif1grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0
|
|
MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
|
|
MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
|
|
MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
|
|
MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
|
|
MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pcie: pciegrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_NAND_DATA05__GPIO4_IO_9 0xb0b0
|
|
MX6SX_PAD_NAND_DATA06__GPIO4_IO_10 0xb0b0
|
|
MX6SX_PAD_NAND_DATA07__GPIO4_IO_11 0xb0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm4: pwm4grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO13__PWM4_OUT 0x110b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_wlan: reg-wlangrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD3_DATA4__GPIO7_IO_6 0x1b0b0
|
|
MX6SX_PAD_GPIO1_IO11__CCM_CLKO1 0x000b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_sgtl5000: sgtl5000grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO12__CCM_CLKO2 0x000b0
|
|
MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x1b0b0
|
|
MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x1b0b0
|
|
MX6SX_PAD_QSPI1A_SS0_B__GPIO4_IO_22 0xb0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
|
|
MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO06__UART2_TX 0x1b0b1
|
|
MX6SX_PAD_GPIO1_IO07__UART2_RX 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_QSPI1B_SS0_B__UART3_TX 0x1b0b1
|
|
MX6SX_PAD_QSPI1B_SCLK__UART3_RX 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart5: uart5grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
|
|
MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
|
|
MX6SX_PAD_SD3_DATA6__UART3_RTS_B 0x1b0b1
|
|
MX6SX_PAD_SD3_DATA7__UART3_CTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg1: usbotg1grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x1b0b0
|
|
MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x170b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg1_vbus: usbotg1-vbusgrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg2: usbotg2grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_QSPI1B_DATA2__GPIO4_IO_26 0xb0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
|
|
MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
|
|
MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
|
|
MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
|
|
MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
|
|
MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
|
|
MX6SX_PAD_KEY_COL2__GPIO2_IO_12 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10071
|
|
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17071
|
|
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17071
|
|
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17071
|
|
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17071
|
|
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17071
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc4_50mhz: usdhc4-50mhzgrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10071
|
|
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17071
|
|
MX6SX_PAD_SD4_RESET_B__USDHC4_RESET_B 0x17071
|
|
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17071
|
|
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17071
|
|
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17071
|
|
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17071
|
|
MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x17071
|
|
MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x17071
|
|
MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x17071
|
|
MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x17071
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc4_100mhz: usdhc4-100mhzgrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100b9
|
|
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170b9
|
|
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170b9
|
|
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170b9
|
|
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170b9
|
|
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170b9
|
|
MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170b9
|
|
MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170b9
|
|
MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170b9
|
|
MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170b9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc4_200mhz: usdhc4-200mhzgrp {
|
|
fsl,pins = <
|
|
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100f9
|
|
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170f9
|
|
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170f9
|
|
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170f9
|
|
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170f9
|
|
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170f9
|
|
MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170f9
|
|
MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170f9
|
|
MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170f9
|
|
MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170f9
|
|
>;
|
|
};
|
|
};
|