forked from Minki/linux
c007b3a697
Several dts files set a bit in the SPEED field for pads
RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there
doesn't have an effect and the bit reads as zero.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
288 lines
6.2 KiB
Plaintext
288 lines
6.2 KiB
Plaintext
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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/ {
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aliases {
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backlight = &backlight;
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panelchan = &panelchan;
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panel7 = &panel7;
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touchscreenp7 = &touchscreenp7;
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};
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chosen {
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stdout-path = &uart2;
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};
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backlight: backlight {
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compatible = "gpio-backlight";
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gpios = <&gpio1 4 0>;
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default-on;
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status = "disabled";
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};
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memory {
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reg = <0x10000000 0x40000000>;
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};
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panel7: panel7 {
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/*
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* in reality it is a -20t (parallel) model,
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* but with LVDS bridge chip attached,
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* so it is equivalent to -19t model in drive
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* characteristics
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*/
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compatible = "urt,umsh-8596md-19t";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_panel>;
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power-supply = <®_panel>;
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backlight = <&backlight>;
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status = "disabled";
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port {
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panel_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_usb_h1_vbus: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
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gpio = <&gpio7 12 0>;
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};
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reg_panel: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "lcd_panel";
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enable-active-high;
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gpio = <&gpio1 2 0>;
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};
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};
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sound {
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compatible = "fsl,imx6q-udoo-ac97",
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"fsl,imx-audio-ac97";
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model = "fsl,imx6q-udoo-ac97";
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audio-cpu = <&ssi1>;
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audio-routing =
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"RX", "Mic Jack",
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"Headphone Jack", "TX";
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mux-int-port = <1>;
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mux-ext-port = <6>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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touchscreenp7: touchscreenp7@55 {
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compatible = "sitronix,st1232";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_touchscreenp7>;
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reg = <0x55>;
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interrupt-parent = <&gpio1>;
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interrupts = <13 8>;
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gpios = <&gpio1 15 0>;
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status = "disabled";
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};
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};
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&iomuxc {
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imx6q-udoo {
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001f8b1
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MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001f8b1
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>;
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};
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pinctrl_panel: panelgrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x70
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MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x70
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>;
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};
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pinctrl_touchscreenp7: touchscreenp7grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70
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MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_usbh: usbhgrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
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MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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>;
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};
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pinctrl_ac97_running: ac97running {
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fsl,pins = <
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MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
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MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
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MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
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MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
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MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
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>;
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};
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pinctrl_ac97_warm_reset: ac97warmreset {
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fsl,pins = <
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MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
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MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
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MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
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MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
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MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
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>;
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};
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pinctrl_ac97_reset: ac97reset {
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fsl,pins = <
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MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
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MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
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MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
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MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
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MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
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>;
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};
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};
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};
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&ldb {
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status = "okay";
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panelchan: lvds-channel@0 {
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port@4 {
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reg = <4>;
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lvds0_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbh1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh>;
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vbus-supply = <®_usb_h1_vbus>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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non-removable;
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status = "okay";
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};
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&audmux {
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status = "okay";
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};
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&ssi1 {
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cell-index = <0>;
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fsl,mode = "ac97-slave";
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pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
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pinctrl-0 = <&pinctrl_ac97_running>;
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pinctrl-1 = <&pinctrl_ac97_reset>;
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pinctrl-2 = <&pinctrl_ac97_warm_reset>;
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ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
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status = "okay";
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};
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