Santosh Shilimkar 7affe5685c clk: keystone: Add gate control clock driver ... Add the driver for the clock gate control which uses PSC (Power Sleep Controller) IP on Keystone 2 based SOCs. It is responsible for enabling and disabling of the clocks for different IPs present in the SoC. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2013-10-07 18:16:30 -07:00
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gate.c	clk: keystone: Add gate control clock driver	2013-10-07 18:16:30 -07:00
pll.c