79ffac8599
In the current scheme, on submitting a request we take a single global GEM wakeref, which trickles down to wake up all GT power domains. This is undesirable as we would like to be able to localise our power management to the available power domains and to remove the global GEM operations from the heart of the driver. (The intent there is to push global GEM decisions to the boundary as used by the GEM user interface.) Now during request construction, each request is responsible via its logical context to acquire a wakeref on each power domain it intends to utilize. Currently, each request takes a wakeref on the engine(s) and the engines themselves take a chipset wakeref. This gives us a transition on each engine which we can extend if we want to insert more powermangement control (such as soft rc6). The global GEM operations that currently require a struct_mutex are reduced to listening to pm events from the chipset GT wakeref. As we reduce the struct_mutex requirement, these listeners should evaporate. Perhaps the biggest immediate change is that this removes the struct_mutex requirement around GT power management, allowing us greater flexibility in request construction. Another important knock-on effect, is that by tracking engine usage, we can insert a switch back to the kernel context on that engine immediately, avoiding any extra delay or inserting global synchronisation barriers. This makes tracking when an engine and its associated contexts are idle much easier -- important for when we forgo our assumed execution ordering and need idle barriers to unpin used contexts. In the process, it means we remove a large chunk of code whose only purpose was to switch back to the kernel context. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Imre Deak <imre.deak@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190424200717.1686-5-chris@chris-wilson.co.uk
230 lines
5.7 KiB
Makefile
230 lines
5.7 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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# Add a set of useful warning flags and enable -Werror for CI to prevent
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# trivial mistakes from creeping in. We have to do this piecemeal as we reject
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# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
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# need to filter out dubious warnings. Still it is our interest
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# to keep running locally with W=1 C=1 until we are completely clean.
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#
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# Note the danger in using -Wall -Wextra is that when CI updates gcc we
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# will most likely get a sudden build breakage... Hopefully we will fix
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# new warnings before CI updates!
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subdir-ccflags-y := -Wall -Wextra
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subdir-ccflags-y += $(call cc-disable-warning, unused-parameter)
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subdir-ccflags-y += $(call cc-disable-warning, type-limits)
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subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
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subdir-ccflags-y += $(call cc-disable-warning, implicit-fallthrough)
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subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)
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# clang warnings
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subdir-ccflags-y += $(call cc-disable-warning, sign-compare)
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subdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized)
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subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)
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subdir-ccflags-y += $(call cc-disable-warning, uninitialized)
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subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
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# Fine grained warnings disable
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CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
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CFLAGS_intel_fbdev.o = $(call cc-disable-warning, override-init)
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subdir-ccflags-y += \
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$(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
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# Extra header tests
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include $(src)/Makefile.header-test
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subdir-ccflags-y += -I$(src)
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# Please keep these build lists sorted!
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# core driver code
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i915-y += i915_drv.o \
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i915_irq.o \
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i915_params.o \
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i915_pci.o \
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i915_suspend.o \
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i915_sysfs.o \
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intel_csr.o \
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intel_device_info.o \
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intel_pm.o \
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intel_runtime_pm.o \
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intel_wakeref.o \
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intel_uncore.o
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# core library code
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i915-y += \
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i915_memcpy.o \
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i915_mm.o \
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i915_sw_fence.o \
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i915_syncmap.o \
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i915_user_extensions.o
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i915-$(CONFIG_COMPAT) += i915_ioc32.o
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i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o intel_pipe_crc.o
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i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
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# "Graphics Technology" (aka we talk to the gpu)
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obj-y += gt/
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gt-y += \
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gt/intel_breadcrumbs.o \
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gt/intel_context.o \
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gt/intel_engine_cs.o \
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gt/intel_engine_pm.o \
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gt/intel_gt_pm.o \
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gt/intel_hangcheck.o \
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gt/intel_lrc.o \
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gt/intel_reset.o \
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gt/intel_ringbuffer.o \
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gt/intel_mocs.o \
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gt/intel_sseu.o \
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gt/intel_workarounds.o
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gt-$(CONFIG_DRM_I915_SELFTEST) += \
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gt/mock_engine.o
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i915-y += $(gt-y)
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# GEM (Graphics Execution Management) code
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i915-y += \
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i915_active.o \
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i915_cmd_parser.o \
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i915_gem_batch_pool.o \
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i915_gem_clflush.o \
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i915_gem_context.o \
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i915_gem_dmabuf.o \
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i915_gem_evict.o \
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i915_gem_execbuffer.o \
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i915_gem_fence_reg.o \
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i915_gem_gtt.o \
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i915_gem_internal.o \
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i915_gem.o \
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i915_gem_object.o \
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i915_gem_pm.o \
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i915_gem_render_state.o \
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i915_gem_shrinker.o \
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i915_gem_stolen.o \
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i915_gem_tiling.o \
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i915_gem_userptr.o \
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i915_gemfs.o \
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i915_globals.o \
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i915_query.o \
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i915_request.o \
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i915_scheduler.o \
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i915_timeline.o \
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i915_trace_points.o \
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i915_vma.o \
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intel_wopcm.o
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# general-purpose microcontroller (GuC) support
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i915-y += intel_uc.o \
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intel_uc_fw.o \
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intel_guc.o \
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intel_guc_ads.o \
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intel_guc_ct.o \
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intel_guc_fw.o \
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intel_guc_log.o \
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intel_guc_submission.o \
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intel_huc.o \
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intel_huc_fw.o
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# autogenerated null render state
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i915-y += intel_renderstate_gen6.o \
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intel_renderstate_gen7.o \
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intel_renderstate_gen8.o \
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intel_renderstate_gen9.o
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# modesetting core code
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i915-y += intel_audio.o \
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intel_atomic.o \
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intel_atomic_plane.o \
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intel_bios.o \
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intel_cdclk.o \
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intel_color.o \
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intel_combo_phy.o \
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intel_connector.o \
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intel_display.o \
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intel_dpio_phy.o \
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intel_dpll_mgr.o \
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intel_fbc.o \
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intel_fifo_underrun.o \
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intel_frontbuffer.o \
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intel_hdcp.o \
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intel_hotplug.o \
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intel_overlay.o \
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intel_psr.o \
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intel_quirks.o \
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intel_sideband.o \
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intel_sprite.o
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i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o
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i915-$(CONFIG_DRM_FBDEV_EMULATION) += intel_fbdev.o
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# modesetting output/encoder code
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i915-y += dvo_ch7017.o \
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dvo_ch7xxx.o \
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dvo_ivch.o \
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dvo_ns2501.o \
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dvo_sil164.o \
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dvo_tfp410.o \
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icl_dsi.o \
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intel_crt.o \
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intel_ddi.o \
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intel_dp_aux_backlight.o \
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intel_dp_link_training.o \
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intel_dp_mst.o \
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intel_dp.o \
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intel_dsi.o \
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intel_dsi_dcs_backlight.o \
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intel_dsi_vbt.o \
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intel_dvo.o \
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intel_hdmi.o \
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intel_i2c.o \
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intel_lspcon.o \
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intel_lvds.o \
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intel_panel.o \
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intel_sdvo.o \
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intel_tv.o \
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vlv_dsi.o \
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vlv_dsi_pll.o \
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intel_vdsc.o
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# Post-mortem debug and GPU hang state capture
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i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
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i915-$(CONFIG_DRM_I915_SELFTEST) += \
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selftests/i915_random.o \
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selftests/i915_selftest.o \
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selftests/igt_flush_test.o \
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selftests/igt_live_test.o \
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selftests/igt_reset.o \
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selftests/igt_spinner.o
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# virtual gpu code
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i915-y += i915_vgpu.o
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# perf code
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i915-y += i915_perf.o \
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i915_oa_hsw.o \
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i915_oa_bdw.o \
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i915_oa_chv.o \
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i915_oa_sklgt2.o \
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i915_oa_sklgt3.o \
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i915_oa_sklgt4.o \
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i915_oa_bxt.o \
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i915_oa_kblgt2.o \
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i915_oa_kblgt3.o \
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i915_oa_glk.o \
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i915_oa_cflgt2.o \
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i915_oa_cflgt3.o \
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i915_oa_cnl.o \
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i915_oa_icl.o
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ifeq ($(CONFIG_DRM_I915_GVT),y)
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i915-y += intel_gvt.o
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include $(src)/gvt/Makefile
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endif
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# LPE Audio for VLV and CHT
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i915-y += intel_lpe_audio.o
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obj-$(CONFIG_DRM_I915) += i915.o
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obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o
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