forked from Minki/linux
d7ca4c755a
Remove specifying mmc controller IP version information via platform data, instead specify device name so that driver derives it from platform_device_id table. Also change the clock node name to match the changed dev_id. Tested on da850-evm to make sure driver loads without clk_get failures. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
410 lines
9.8 KiB
C
410 lines
9.8 KiB
C
/*
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* Texas Instruments TNETV107X SoC devices
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*
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* Copyright (C) 2010 Texas Instruments
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/clk.h>
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#include <linux/slab.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <mach/edma.h>
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#include <mach/tnetv107x.h>
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#include "clock.h"
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/* Base addresses for on-chip devices */
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#define TNETV107X_TPCC_BASE 0x01c00000
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#define TNETV107X_TPTC0_BASE 0x01c10000
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#define TNETV107X_TPTC1_BASE 0x01c10400
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#define TNETV107X_WDOG_BASE 0x08086700
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#define TNETV107X_TSC_BASE 0x08088500
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#define TNETV107X_SDIO0_BASE 0x08088700
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#define TNETV107X_SDIO1_BASE 0x08088800
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#define TNETV107X_KEYPAD_BASE 0x08088a00
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#define TNETV107X_SSP_BASE 0x08088c00
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#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000
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#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000
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#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000
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#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE 0x44000000
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#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE 0x48000000
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/* TNETV107X specific EDMA3 information */
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#define EDMA_TNETV107X_NUM_DMACH 64
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#define EDMA_TNETV107X_NUM_TCC 64
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#define EDMA_TNETV107X_NUM_PARAMENTRY 128
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#define EDMA_TNETV107X_NUM_EVQUE 2
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#define EDMA_TNETV107X_NUM_TC 2
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#define EDMA_TNETV107X_CHMAP_EXIST 0
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#define EDMA_TNETV107X_NUM_REGIONS 4
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#define TNETV107X_DMACH2EVENT_MAP0 0x3C0CE000u
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#define TNETV107X_DMACH2EVENT_MAP1 0x000FFFFFu
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#define TNETV107X_DMACH_SDIO0_RX 26
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#define TNETV107X_DMACH_SDIO0_TX 27
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#define TNETV107X_DMACH_SDIO1_RX 28
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#define TNETV107X_DMACH_SDIO1_TX 29
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static const s8 edma_tc_mapping[][2] = {
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/* event queue no TC no */
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{ 0, 0 },
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{ 1, 1 },
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{ -1, -1 }
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};
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static const s8 edma_priority_mapping[][2] = {
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/* event queue no Prio */
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{ 0, 3 },
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{ 1, 7 },
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{ -1, -1 }
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};
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static struct edma_soc_info edma_cc0_info = {
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.n_channel = EDMA_TNETV107X_NUM_DMACH,
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.n_region = EDMA_TNETV107X_NUM_REGIONS,
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.n_slot = EDMA_TNETV107X_NUM_PARAMENTRY,
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.n_tc = EDMA_TNETV107X_NUM_TC,
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.n_cc = 1,
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.queue_tc_mapping = edma_tc_mapping,
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.queue_priority_mapping = edma_priority_mapping,
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.default_queue = EVENTQ_1,
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};
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static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
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&edma_cc0_info,
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};
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static struct resource edma_resources[] = {
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{
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.name = "edma_cc0",
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.start = TNETV107X_TPCC_BASE,
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.end = TNETV107X_TPCC_BASE + SZ_32K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "edma_tc0",
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.start = TNETV107X_TPTC0_BASE,
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.end = TNETV107X_TPTC0_BASE + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "edma_tc1",
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.start = TNETV107X_TPTC1_BASE,
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.end = TNETV107X_TPTC1_BASE + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "edma0",
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.start = IRQ_TNETV107X_TPCC,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "edma0_err",
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.start = IRQ_TNETV107X_TPCC_ERR,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device edma_device = {
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.name = "edma",
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.id = -1,
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.num_resources = ARRAY_SIZE(edma_resources),
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.resource = edma_resources,
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.dev.platform_data = tnetv107x_edma_info,
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};
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static struct plat_serial8250_port serial_data[] = {
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{
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.mapbase = TNETV107X_UART0_BASE,
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.irq = IRQ_TNETV107X_UART0,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
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UPF_FIXED_TYPE | UPF_IOREMAP,
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.type = PORT_AR7,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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},
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{
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.mapbase = TNETV107X_UART1_BASE,
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.irq = IRQ_TNETV107X_UART1,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
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UPF_FIXED_TYPE | UPF_IOREMAP,
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.type = PORT_AR7,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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},
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{
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.mapbase = TNETV107X_UART2_BASE,
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.irq = IRQ_TNETV107X_UART2,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
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UPF_FIXED_TYPE | UPF_IOREMAP,
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.type = PORT_AR7,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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},
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{
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.flags = 0,
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},
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};
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struct platform_device tnetv107x_serial_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev.platform_data = serial_data,
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};
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static struct resource mmc0_resources[] = {
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{ /* Memory mapped registers */
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.start = TNETV107X_SDIO0_BASE,
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.end = TNETV107X_SDIO0_BASE + 0x0ff,
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.flags = IORESOURCE_MEM
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},
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{ /* MMC interrupt */
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.start = IRQ_TNETV107X_MMC0,
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.flags = IORESOURCE_IRQ
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},
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{ /* SDIO interrupt */
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.start = IRQ_TNETV107X_SDIO0,
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.flags = IORESOURCE_IRQ
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},
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{ /* DMA RX */
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.start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
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.flags = IORESOURCE_DMA
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},
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{ /* DMA TX */
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.start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX),
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.flags = IORESOURCE_DMA
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},
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};
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static struct resource mmc1_resources[] = {
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{ /* Memory mapped registers */
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.start = TNETV107X_SDIO1_BASE,
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.end = TNETV107X_SDIO1_BASE + 0x0ff,
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.flags = IORESOURCE_MEM
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},
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{ /* MMC interrupt */
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.start = IRQ_TNETV107X_MMC1,
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.flags = IORESOURCE_IRQ
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},
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{ /* SDIO interrupt */
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.start = IRQ_TNETV107X_SDIO1,
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.flags = IORESOURCE_IRQ
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},
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{ /* DMA RX */
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.start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX),
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.flags = IORESOURCE_DMA
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},
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{ /* DMA TX */
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.start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX),
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.flags = IORESOURCE_DMA
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},
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};
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static u64 mmc0_dma_mask = DMA_BIT_MASK(32);
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static u64 mmc1_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device mmc_devices[2] = {
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{
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.name = "dm6441-mmc",
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.id = 0,
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.dev = {
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.dma_mask = &mmc0_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(mmc0_resources),
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.resource = mmc0_resources
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},
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{
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.name = "dm6441-mmc",
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.id = 1,
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.dev = {
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.dma_mask = &mmc1_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(mmc1_resources),
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.resource = mmc1_resources
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},
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};
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static const u32 emif_windows[] = {
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TNETV107X_ASYNC_EMIF_DATA_CE0_BASE, TNETV107X_ASYNC_EMIF_DATA_CE1_BASE,
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TNETV107X_ASYNC_EMIF_DATA_CE2_BASE, TNETV107X_ASYNC_EMIF_DATA_CE3_BASE,
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};
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static const u32 emif_window_sizes[] = { SZ_256M, SZ_64M, SZ_64M, SZ_64M };
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static struct resource wdt_resources[] = {
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{
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.start = TNETV107X_WDOG_BASE,
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.end = TNETV107X_WDOG_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device tnetv107x_wdt_device = {
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.name = "tnetv107x_wdt",
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.id = 0,
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.num_resources = ARRAY_SIZE(wdt_resources),
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.resource = wdt_resources,
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};
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static int __init nand_init(int chipsel, struct davinci_nand_pdata *data)
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{
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struct resource res[2];
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struct platform_device *pdev;
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u32 range;
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int ret;
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/* Figure out the resource range from the ale/cle masks */
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range = max(data->mask_cle, data->mask_ale);
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range = PAGE_ALIGN(range + 4) - 1;
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if (range >= emif_window_sizes[chipsel])
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return -EINVAL;
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pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
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if (!pdev)
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return -ENOMEM;
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pdev->name = "davinci_nand";
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pdev->id = chipsel;
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pdev->dev.platform_data = data;
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memset(res, 0, sizeof(res));
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res[0].start = emif_windows[chipsel];
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res[0].end = res[0].start + range;
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res[0].flags = IORESOURCE_MEM;
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res[1].start = TNETV107X_ASYNC_EMIF_CNTRL_BASE;
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res[1].end = res[1].start + SZ_4K - 1;
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res[1].flags = IORESOURCE_MEM;
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ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
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if (ret < 0) {
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kfree(pdev);
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return ret;
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}
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return platform_device_register(pdev);
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}
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static struct resource keypad_resources[] = {
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{
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.start = TNETV107X_KEYPAD_BASE,
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.end = TNETV107X_KEYPAD_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_TNETV107X_KEYPAD,
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.flags = IORESOURCE_IRQ,
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.name = "press",
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},
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{
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.start = IRQ_TNETV107X_KEYPAD_FREE,
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.flags = IORESOURCE_IRQ,
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.name = "release",
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},
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};
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static struct platform_device keypad_device = {
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.name = "tnetv107x-keypad",
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.num_resources = ARRAY_SIZE(keypad_resources),
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.resource = keypad_resources,
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};
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static struct resource tsc_resources[] = {
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{
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.start = TNETV107X_TSC_BASE,
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.end = TNETV107X_TSC_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_TNETV107X_TSC,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device tsc_device = {
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.name = "tnetv107x-ts",
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.num_resources = ARRAY_SIZE(tsc_resources),
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.resource = tsc_resources,
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};
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static struct resource ssp_resources[] = {
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{
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.start = TNETV107X_SSP_BASE,
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.end = TNETV107X_SSP_BASE + 0x1ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_TNETV107X_SSP,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device ssp_device = {
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.name = "ti-ssp",
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.id = -1,
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.num_resources = ARRAY_SIZE(ssp_resources),
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.resource = ssp_resources,
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};
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void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
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{
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int i, error;
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struct clk *tsc_clk;
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/*
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* The reset defaults for tnetv107x tsc clock divider is set too high.
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* This forces the clock down to a range that allows the ADC to
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* complete sample conversion in time.
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*/
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tsc_clk = clk_get(NULL, "sys_tsc_clk");
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if (!IS_ERR(tsc_clk)) {
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error = clk_set_rate(tsc_clk, 5000000);
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WARN_ON(error < 0);
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clk_put(tsc_clk);
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}
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platform_device_register(&edma_device);
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platform_device_register(&tnetv107x_wdt_device);
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platform_device_register(&tsc_device);
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if (info->serial_config)
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davinci_serial_init(info->serial_config);
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for (i = 0; i < 2; i++)
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if (info->mmc_config[i]) {
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mmc_devices[i].dev.platform_data = info->mmc_config[i];
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platform_device_register(&mmc_devices[i]);
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}
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for (i = 0; i < 4; i++)
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if (info->nand_config[i])
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nand_init(i, info->nand_config[i]);
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if (info->keypad_config) {
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keypad_device.dev.platform_data = info->keypad_config;
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platform_device_register(&keypad_device);
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}
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if (info->ssp_config) {
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ssp_device.dev.platform_data = info->ssp_config;
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platform_device_register(&ssp_device);
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}
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}
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