952ace797c
Pull iommu updates from Joerg Roedel:
- Remove of the dev->archdata.iommu (or similar) pointers from most
architectures. Only Sparc is left, but this is private to Sparc as
their drivers don't use the IOMMU-API.
- ARM-SMMU updates from Will Deacon:
- Support for SMMU-500 implementation in Marvell Armada-AP806 SoC
- Support for SMMU-500 implementation in NVIDIA Tegra194 SoC
- DT compatible string updates
- Remove unused IOMMU_SYS_CACHE_ONLY flag
- Move ARM-SMMU drivers into their own subdirectory
- Intel VT-d updates from Lu Baolu:
- Misc tweaks and fixes for vSVA
- Report/response page request events
- Cleanups
- Move the Kconfig and Makefile bits for the AMD and Intel drivers into
their respective subdirectory.
- MT6779 IOMMU Support
- Support for new chipsets in the Renesas IOMMU driver
- Other misc cleanups and fixes (e.g. to improve compile test coverage)
* tag 'iommu-updates-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (77 commits)
iommu/amd: Move Kconfig and Makefile bits down into amd directory
iommu/vt-d: Move Kconfig and Makefile bits down into intel directory
iommu/arm-smmu: Move Arm SMMU drivers into their own subdirectory
iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu
iommu: Add gfp parameter to io_pgtable_ops->map()
iommu: Mark __iommu_map_sg() as static
iommu/vt-d: Rename intel-pasid.h to pasid.h
iommu/vt-d: Add page response ops support
iommu/vt-d: Report page request faults for guest SVA
iommu/vt-d: Add a helper to get svm and sdev for pasid
iommu/vt-d: Refactor device_to_iommu() helper
iommu/vt-d: Disable multiple GPASID-dev bind
iommu/vt-d: Warn on out-of-range invalidation address
iommu/vt-d: Fix devTLB flush for vSVA
iommu/vt-d: Handle non-page aligned address
iommu/vt-d: Fix PASID devTLB invalidation
iommu/vt-d: Remove global page support in devTLB flush
iommu/vt-d: Enforce PASID devTLB field mask
iommu: Make some functions static
iommu/amd: Remove double zero check
...
54 lines
1016 B
C
54 lines
1016 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Arch specific extensions to struct device
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*/
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#ifndef _ASM_POWERPC_DEVICE_H
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#define _ASM_POWERPC_DEVICE_H
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struct device_node;
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#ifdef CONFIG_PPC64
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struct pci_dn;
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struct iommu_table;
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#endif
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/*
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* Arch extensions to struct device.
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*
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* When adding fields, consider macio_add_one_device in
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* drivers/macintosh/macio_asic.c
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*/
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struct dev_archdata {
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/*
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* These two used to be a union. However, with the hybrid ops we need
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* both so here we store both a DMA offset for direct mappings and
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* an iommu_table for remapped DMA.
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*/
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dma_addr_t dma_offset;
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#ifdef CONFIG_PPC64
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struct iommu_table *iommu_table_base;
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#endif
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#ifdef CONFIG_PPC64
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struct pci_dn *pci_data;
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#endif
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#ifdef CONFIG_EEH
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struct eeh_dev *edev;
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#endif
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#ifdef CONFIG_FAIL_IOMMU
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int fail_iommu;
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#endif
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#ifdef CONFIG_CXL_BASE
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struct cxl_context *cxl_ctx;
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#endif
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#ifdef CONFIG_PCI_IOV
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void *iov_data;
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#endif
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};
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struct pdev_archdata {
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u64 dma_mask;
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};
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#endif /* _ASM_POWERPC_DEVICE_H */
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