c32ffce0f6
After a bunch of benchmarking on the interaction between dmb and pldw, it turns out that issuing the pldw *after* the dmb instruction can give modest performance gains (~3% atomic_add_return improvement on a dual A15). This patch adds prefetchw invocations to our barriered atomic operations including cmpxchg, test_and_xxx and futexes. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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| .. | ||
| ashldi3.S | ||
| ashrdi3.S | ||
| backtrace.S | ||
| bitops.h | ||
| bswapsdi2.S | ||
| call_with_stack.S | ||
| changebit.S | ||
| clear_user.S | ||
| clearbit.S | ||
| copy_from_user.S | ||
| copy_page.S | ||
| copy_template.S | ||
| copy_to_user.S | ||
| csumipv6.S | ||
| csumpartial.S | ||
| csumpartialcopy.S | ||
| csumpartialcopygeneric.S | ||
| csumpartialcopyuser.S | ||
| delay-loop.S | ||
| delay.c | ||
| div64.S | ||
| ecard.S | ||
| findbit.S | ||
| floppydma.S | ||
| getuser.S | ||
| io-acorn.S | ||
| io-readsb.S | ||
| io-readsl.S | ||
| io-readsw-armv3.S | ||
| io-readsw-armv4.S | ||
| io-writesb.S | ||
| io-writesl.S | ||
| io-writesw-armv3.S | ||
| io-writesw-armv4.S | ||
| lib1funcs.S | ||
| lshrdi3.S | ||
| Makefile | ||
| memchr.S | ||
| memcpy.S | ||
| memmove.S | ||
| memset.S | ||
| memzero.S | ||
| muldi3.S | ||
| putuser.S | ||
| setbit.S | ||
| strchr.S | ||
| strrchr.S | ||
| testchangebit.S | ||
| testclearbit.S | ||
| testsetbit.S | ||
| uaccess_with_memcpy.c | ||
| uaccess.S | ||
| ucmpdi2.S | ||
| xor-neon.c | ||