forked from Minki/linux
1e0b0a0cf3
PX30 SoCs use a single PHY shared by two display pipelines: MIPI DSI and LVDS. In the case of the LVDS IP, document the possibility to fill a PHY handle. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20191224143900.23567-3-miquel.raynal@bootlin.com |
||
---|---|---|
.. | ||
analogix_dp-rockchip.txt | ||
cdn-dp-rockchip.txt | ||
dw_hdmi-rockchip.txt | ||
dw_mipi_dsi_rockchip.txt | ||
inno_hdmi-rockchip.txt | ||
rockchip-drm.txt | ||
rockchip-lvds.txt | ||
rockchip-vop.txt | ||
rockchip,rk3066-hdmi.txt |