linux/arch/riscv/include/asm
2017-12-01 13:14:36 -08:00
..
asm-offsets.h
asm.h
atomic.h RISC-V: Comment on why {,cmp}xchg is ordered how it is 2017-11-28 14:03:29 -08:00
barrier.h RISC-V: Remove smb_mb__{before,after}_spinlock() 2017-11-28 14:03:55 -08:00
bitops.h RISC-V: __test_and_op_bit_ord should be strongly ordered 2017-11-28 14:04:05 -08:00
bug.h
cache.h
cacheflush.h RISC-V: Allow userspace to flush the instruction cache 2017-11-30 12:58:29 -08:00
cmpxchg.h
compat.h
csr.h
current.h
delay.h
dma-mapping.h
elf.h
hwcap.h
io.h RISC-V: __io_writes should respect the length argument 2017-12-01 13:09:57 -08:00
irq.h
irqflags.h
Kbuild
kprobes.h
linkage.h
mmu_context.h RISC-V: Flush I$ when making a dirty page executable 2017-11-30 12:58:25 -08:00
mmu.h RISC-V: Flush I$ when making a dirty page executable 2017-11-30 12:58:25 -08:00
page.h
pci.h
pgalloc.h
pgtable-32.h
pgtable-64.h
pgtable-bits.h
pgtable.h RISC-V: Flush I$ when making a dirty page executable 2017-11-30 12:58:25 -08:00
processor.h
ptrace.h
sbi.h
smp.h
spinlock_types.h
spinlock.h RISC-V: remove spin_unlock_wait() 2017-11-28 14:06:31 -08:00
string.h
switch_to.h
syscall.h
thread_info.h
timex.h
tlb.h
tlbflush.h RISC-V: User-Visible Changes 2017-12-01 13:12:10 -08:00
uaccess.h
unistd.h
vdso-syscalls.h RISC-V: Allow userspace to flush the instruction cache 2017-11-30 12:58:29 -08:00
vdso.h RISC-V: Allow userspace to flush the instruction cache 2017-11-30 12:58:29 -08:00
word-at-a-time.h