Dan Carpenter 377cfdc6ee drm/nvc0-/gr: shift wrapping bug in nvc0_grctx_generate_r406800 ... We care about the upper 32 bits here so we have to use 1ULL instead of 1 to avoid a shift wrapping bug. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>		2013-11-14 14:57:03 +10:00
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bsp	drm/nouveau/vdec: implement support for VP3 engines	2013-09-04 13:46:15 +10:00
copy	drm/nouveau/core: move falcon class to engine/	2013-07-01 13:50:47 +10:00
crypt	drm/nouveau/core: move falcon class to engine/	2013-07-01 13:50:47 +10:00
device	drm/nvc8/mc: msi rearm is via the nvc0 method	2013-11-14 14:55:05 +10:00
disp	drm/nouveau/disp: semi-complete link training sequence even if display disappears	2013-11-08 15:39:57 +10:00
dmaobj	drm/nvf0/disp: expose display class 2.2	2013-05-02 16:23:13 +10:00
fifo	drm/nvc0-: remove nasty fifo swmthd hack for flip completion method	2013-11-14 14:56:51 +10:00
graph	drm/nvc0-/gr: shift wrapping bug in nvc0_grctx_generate_r406800	2013-11-14 14:57:03 +10:00
mpeg	drm/nv31/mpeg: remove need for separate refcnt on engine use	2013-11-08 15:37:43 +10:00
perfmon	drm/nouveau/perfmon: initial infrastructure to expose performance counters	2013-11-08 15:40:05 +10:00
ppp	drm/nouveau/vdec: implement support for VP3 engines	2013-09-04 13:46:15 +10:00
software	drm/nouveau/core: convert event handler apis to split create/enable semantics	2013-11-08 15:36:06 +10:00
vp	drm/nouveau/vdec: implement support for VP3 engines	2013-09-04 13:46:15 +10:00
falcon.c	drm/nouveau: add falcon interrupt handler	2013-07-10 10:48:07 +10:00
xtensa.c	drm/nouveau/core: xtensa firmware size needs to be 0x40000 no matter what	2013-07-30 13:03:59 +10:00