linux/drivers/gpu
Thierry Reding 67a82dbc0a gpu: host1x: Support 40-bit addressing
Tegra186 and later support 40 bits of address space. Additional
registers need to be programmed to store the full 40 bits of push
buffer addresses.

Since command stream gathers can also reside in buffers in a 40-bit
address space, a new variant of the GATHER opcode is also introduced.
It takes two parameters: the first parameter contains the lower 32
bits of the address and the second parameter contains bits 32 to 39.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 18:28:35 +01:00
..
drm drm/tegra: hdmi: Fix audio to work with any pixel clock rate 2019-01-16 13:11:45 +01:00
host1x gpu: host1x: Support 40-bit addressing 2019-02-07 18:28:35 +01:00
ipu-v3 gpu: ipu-v3: image-convert: allow three rows or columns 2018-11-05 14:40:08 +01:00
vga drm-misc-next for v4.21, part 1: 2018-11-19 10:40:33 +10:00
Makefile