forked from Minki/linux
5fc0b42a98
Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
190 lines
3.8 KiB
Plaintext
190 lines
3.8 KiB
Plaintext
/*
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* Device Tree Source for AM33XX SoC
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*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "ti,am33xx";
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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serial5 = &uart6;
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};
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a8";
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};
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};
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/*
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* The soc node represents the soc top level view. It is uses for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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};
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/*
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* XXX: Use a flat representation of the AM33XX interconnect.
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* The real AM33XX interconnect network is quite complex.Since
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* that will not bring real advantage to represent that in DT
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* for the moment, just use a fake OCP bus entry to represent
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* the whole bus hierarchy.
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*/
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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intc: interrupt-controller@48200000 {
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compatible = "ti,omap2-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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ti,intc-size = <128>;
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reg = <0x48200000 0x1000>;
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};
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gpio1: gpio@44e07000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio2: gpio@4804C000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio3: gpio@481AC000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio3";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio4: gpio@481AE000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio4";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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uart1: serial@44E09000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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};
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uart2: serial@48022000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart2";
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clock-frequency = <48000000>;
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};
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uart3: serial@48024000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart3";
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clock-frequency = <48000000>;
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};
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uart4: serial@481A6000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart4";
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clock-frequency = <48000000>;
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};
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uart5: serial@481A8000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart5";
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clock-frequency = <48000000>;
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};
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uart6: serial@481AA000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart6";
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clock-frequency = <48000000>;
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};
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i2c1: i2c@44E0B000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c1";
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};
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i2c2: i2c@4802A000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c2";
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};
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i2c3: i2c@4819C000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c3";
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};
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mcspi1: spi@48030000 {
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compatible = "ti,omap2-mcspi";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "spi0";
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ti,spi-num-cs = <4>;
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};
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mcspi2: spi@481Aa000 {
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compatible = "ti,omap2-mcspi";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "spi1";
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ti,spi-num-cs = <2>;
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};
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mmc1: mmc@48060000 {
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compatible = "ti,omap3-hsmmc";
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ti,hwmods = "mmc1";
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};
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mmc2: mmc@481D8000 {
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compatible = "ti,omap3-hsmmc";
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ti,hwmods = "mmc2";
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};
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mmc3: mmc@47810000 {
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compatible = "ti,omap3-hsmmc";
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ti,hwmods = "mmc3";
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};
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};
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};
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