forked from Minki/linux
988437aec0
This is a driver for Low Power General Purpose Register (LPGPR) available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS) of this chip. It is a 32-bit read/write register located in the low power domain. Since LPGPR is located in the battery-backed power domain, LPGPR can be used by any application for retaining data during an SoC power-down mode. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
35 lines
1.2 KiB
Makefile
35 lines
1.2 KiB
Makefile
#
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# Makefile for nvmem drivers.
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#
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obj-$(CONFIG_NVMEM) += nvmem_core.o
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nvmem_core-y := core.o
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# Devices
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obj-$(CONFIG_NVMEM_BCM_OCOTP) += nvmem-bcm-ocotp.o
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nvmem-bcm-ocotp-y := bcm-ocotp.o
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obj-$(CONFIG_NVMEM_IMX_IIM) += nvmem-imx-iim.o
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nvmem-imx-iim-y := imx-iim.o
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obj-$(CONFIG_NVMEM_IMX_OCOTP) += nvmem-imx-ocotp.o
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nvmem-imx-ocotp-y := imx-ocotp.o
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obj-$(CONFIG_NVMEM_LPC18XX_EEPROM) += nvmem_lpc18xx_eeprom.o
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nvmem_lpc18xx_eeprom-y := lpc18xx_eeprom.o
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obj-$(CONFIG_NVMEM_LPC18XX_OTP) += nvmem_lpc18xx_otp.o
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nvmem_lpc18xx_otp-y := lpc18xx_otp.o
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obj-$(CONFIG_NVMEM_MXS_OCOTP) += nvmem-mxs-ocotp.o
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nvmem-mxs-ocotp-y := mxs-ocotp.o
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obj-$(CONFIG_MTK_EFUSE) += nvmem_mtk-efuse.o
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nvmem_mtk-efuse-y := mtk-efuse.o
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obj-$(CONFIG_QCOM_QFPROM) += nvmem_qfprom.o
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nvmem_qfprom-y := qfprom.o
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obj-$(CONFIG_ROCKCHIP_EFUSE) += nvmem_rockchip_efuse.o
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nvmem_rockchip_efuse-y := rockchip-efuse.o
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obj-$(CONFIG_NVMEM_SUNXI_SID) += nvmem_sunxi_sid.o
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nvmem_sunxi_sid-y := sunxi_sid.o
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obj-$(CONFIG_NVMEM_VF610_OCOTP) += nvmem-vf610-ocotp.o
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nvmem-vf610-ocotp-y := vf610-ocotp.o
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obj-$(CONFIG_MESON_EFUSE) += nvmem_meson_efuse.o
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nvmem_meson_efuse-y := meson-efuse.o
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obj-$(CONFIG_NVMEM_SNVS_LPGPR) += nvmem_snvs_lpgpr.o
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nvmem_snvs_lpgpr-y := snvs_lpgpr.o
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