forked from Minki/linux
52b461b86a
Use the most simple possible transformation on the existing code so keep the table sitting around, further patches in this series will delete the existing cache code - the main purpose of this patch is to ensure that we always have a cache for bisection. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
775 lines
18 KiB
C
775 lines
18 KiB
C
/*
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* wm8350-core.c -- Device access for Wolfson WM8350
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*
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* Copyright 2007, 2008 Wolfson Microelectronics PLC.
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*
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* Author: Liam Girdwood, Mark Brown
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/bug.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/regmap.h>
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#include <linux/workqueue.h>
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#include <linux/mfd/wm8350/core.h>
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#include <linux/mfd/wm8350/audio.h>
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#include <linux/mfd/wm8350/comparator.h>
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#include <linux/mfd/wm8350/gpio.h>
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#include <linux/mfd/wm8350/pmic.h>
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#include <linux/mfd/wm8350/rtc.h>
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#include <linux/mfd/wm8350/supply.h>
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#include <linux/mfd/wm8350/wdt.h>
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#define WM8350_CLOCK_CONTROL_1 0x28
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#define WM8350_AIF_TEST 0x74
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/* debug */
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#define WM8350_BUS_DEBUG 0
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#if WM8350_BUS_DEBUG
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#define dump(regs, src) do { \
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int i_; \
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u16 *src_ = src; \
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printk(KERN_DEBUG); \
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for (i_ = 0; i_ < regs; i_++) \
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printk(" 0x%4.4x", *src_++); \
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printk("\n"); \
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} while (0);
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#else
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#define dump(bytes, src)
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#endif
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#define WM8350_LOCK_DEBUG 0
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#if WM8350_LOCK_DEBUG
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#define ldbg(format, arg...) printk(format, ## arg)
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#else
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#define ldbg(format, arg...)
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#endif
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/*
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* WM8350 Device IO
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*/
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static DEFINE_MUTEX(io_mutex);
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static DEFINE_MUTEX(reg_lock_mutex);
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/* Perform a physical read from the device.
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*/
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static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
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u16 *dest)
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{
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int i, ret;
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int bytes = num_regs * 2;
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dev_dbg(wm8350->dev, "volatile read\n");
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ret = regmap_raw_read(wm8350->regmap, reg, dest, bytes);
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for (i = reg; i < reg + num_regs; i++) {
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/* Cache is CPU endian */
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dest[i - reg] = be16_to_cpu(dest[i - reg]);
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/* Mask out non-readable bits */
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dest[i - reg] &= wm8350_reg_io_map[i].readable;
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}
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dump(num_regs, dest);
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return ret;
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}
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static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
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{
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int i;
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int end = reg + num_regs;
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int ret = 0;
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int bytes = num_regs * 2;
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if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
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dev_err(wm8350->dev, "invalid reg %x\n",
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reg + num_regs - 1);
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return -EINVAL;
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}
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dev_dbg(wm8350->dev,
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"%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
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#if WM8350_BUS_DEBUG
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/* we can _safely_ read any register, but warn if read not supported */
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for (i = reg; i < end; i++) {
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if (!wm8350_reg_io_map[i].readable)
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dev_warn(wm8350->dev,
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"reg R%d is not readable\n", i);
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}
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#endif
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/* if any volatile registers are required, then read back all */
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for (i = reg; i < end; i++)
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if (wm8350_reg_io_map[i].vol)
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return wm8350_phys_read(wm8350, reg, num_regs, dest);
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/* no volatiles, then cache is good */
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dev_dbg(wm8350->dev, "cache read\n");
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memcpy(dest, &wm8350->reg_cache[reg], bytes);
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dump(num_regs, dest);
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return ret;
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}
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static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
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{
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if (reg == WM8350_SECURITY ||
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wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
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return 0;
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if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
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reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
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(reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
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reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
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return 1;
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return 0;
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}
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static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
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{
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int i;
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int end = reg + num_regs;
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int bytes = num_regs * 2;
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if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
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dev_err(wm8350->dev, "invalid reg %x\n",
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reg + num_regs - 1);
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return -EINVAL;
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}
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/* it's generally not a good idea to write to RO or locked registers */
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for (i = reg; i < end; i++) {
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if (!wm8350_reg_io_map[i].writable) {
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dev_err(wm8350->dev,
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"attempted write to read only reg R%d\n", i);
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return -EINVAL;
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}
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if (is_reg_locked(wm8350, i)) {
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dev_err(wm8350->dev,
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"attempted write to locked reg R%d\n", i);
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return -EINVAL;
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}
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src[i - reg] &= wm8350_reg_io_map[i].writable;
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wm8350->reg_cache[i] =
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(wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
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| src[i - reg];
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src[i - reg] = cpu_to_be16(src[i - reg]);
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}
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/* Actually write it out */
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return regmap_raw_write(wm8350->regmap, reg, src, bytes);
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}
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/*
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* Safe read, modify, write methods
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*/
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int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
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{
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u16 data;
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int err;
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mutex_lock(&io_mutex);
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err = wm8350_read(wm8350, reg, 1, &data);
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if (err) {
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dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
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goto out;
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}
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data &= ~mask;
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err = wm8350_write(wm8350, reg, 1, &data);
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if (err)
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dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
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out:
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mutex_unlock(&io_mutex);
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return err;
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}
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EXPORT_SYMBOL_GPL(wm8350_clear_bits);
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int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
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{
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u16 data;
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int err;
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mutex_lock(&io_mutex);
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err = wm8350_read(wm8350, reg, 1, &data);
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if (err) {
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dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
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goto out;
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}
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data |= mask;
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err = wm8350_write(wm8350, reg, 1, &data);
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if (err)
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dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
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out:
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mutex_unlock(&io_mutex);
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return err;
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}
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EXPORT_SYMBOL_GPL(wm8350_set_bits);
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u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
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{
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u16 data;
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int err;
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mutex_lock(&io_mutex);
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err = wm8350_read(wm8350, reg, 1, &data);
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if (err)
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dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
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mutex_unlock(&io_mutex);
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return data;
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}
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EXPORT_SYMBOL_GPL(wm8350_reg_read);
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int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
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{
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int ret;
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u16 data = val;
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mutex_lock(&io_mutex);
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ret = wm8350_write(wm8350, reg, 1, &data);
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if (ret)
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dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
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mutex_unlock(&io_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_reg_write);
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int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
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u16 *dest)
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{
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int err = 0;
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mutex_lock(&io_mutex);
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err = wm8350_read(wm8350, start_reg, regs, dest);
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if (err)
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dev_err(wm8350->dev, "block read starting from R%d failed\n",
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start_reg);
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mutex_unlock(&io_mutex);
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return err;
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}
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EXPORT_SYMBOL_GPL(wm8350_block_read);
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int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
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u16 *src)
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{
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int ret = 0;
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mutex_lock(&io_mutex);
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ret = wm8350_write(wm8350, start_reg, regs, src);
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if (ret)
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dev_err(wm8350->dev, "block write starting at R%d failed\n",
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start_reg);
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mutex_unlock(&io_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_block_write);
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/**
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* wm8350_reg_lock()
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*
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* The WM8350 has a hardware lock which can be used to prevent writes to
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* some registers (generally those which can cause particularly serious
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* problems if misused). This function enables that lock.
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*/
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int wm8350_reg_lock(struct wm8350 *wm8350)
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{
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int ret;
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mutex_lock(®_lock_mutex);
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ldbg(__func__);
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ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_LOCK_KEY);
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if (ret)
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dev_err(wm8350->dev, "lock failed\n");
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wm8350->unlocked = false;
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mutex_unlock(®_lock_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_reg_lock);
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/**
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* wm8350_reg_unlock()
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*
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* The WM8350 has a hardware lock which can be used to prevent writes to
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* some registers (generally those which can cause particularly serious
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* problems if misused). This function disables that lock so updates
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* can be performed. For maximum safety this should be done only when
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* required.
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*/
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int wm8350_reg_unlock(struct wm8350 *wm8350)
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{
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int ret;
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mutex_lock(®_lock_mutex);
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ldbg(__func__);
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ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_UNLOCK_KEY);
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if (ret)
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dev_err(wm8350->dev, "unlock failed\n");
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wm8350->unlocked = true;
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mutex_unlock(®_lock_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
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int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
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{
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u16 reg, result = 0;
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if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
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return -EINVAL;
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if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
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&& (scale != 0 || vref != 0))
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return -EINVAL;
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mutex_lock(&wm8350->auxadc_mutex);
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/* Turn on the ADC */
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reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
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wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
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if (scale || vref) {
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reg = scale << 13;
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reg |= vref << 12;
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wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
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}
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reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
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reg |= 1 << channel | WM8350_AUXADC_POLL;
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wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
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/* If a late IRQ left the completion signalled then consume
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* the completion. */
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try_wait_for_completion(&wm8350->auxadc_done);
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/* We ignore the result of the completion and just check for a
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* conversion result, allowing us to soldier on if the IRQ
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* infrastructure is not set up for the chip. */
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wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));
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reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
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if (reg & WM8350_AUXADC_POLL)
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dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
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else
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result = wm8350_reg_read(wm8350,
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WM8350_AUX1_READBACK + channel);
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/* Turn off the ADC */
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reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
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wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
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reg & ~WM8350_AUXADC_ENA);
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mutex_unlock(&wm8350->auxadc_mutex);
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return result & WM8350_AUXADC_DATA1_MASK;
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}
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EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
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static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
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{
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struct wm8350 *wm8350 = irq_data;
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complete(&wm8350->auxadc_done);
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return IRQ_HANDLED;
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}
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/*
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* Cache is always host endian.
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*/
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static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
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{
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int i, ret = 0;
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u16 value;
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const u16 *reg_map;
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switch (type) {
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case 0:
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switch (mode) {
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#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
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case 0:
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reg_map = wm8350_mode0_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
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case 1:
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reg_map = wm8350_mode1_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
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case 2:
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reg_map = wm8350_mode2_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
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case 3:
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reg_map = wm8350_mode3_defaults;
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break;
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#endif
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default:
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dev_err(wm8350->dev,
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"WM8350 configuration mode %d not supported\n",
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mode);
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return -EINVAL;
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}
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break;
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case 1:
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switch (mode) {
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#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
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case 0:
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reg_map = wm8351_mode0_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
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case 1:
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reg_map = wm8351_mode1_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
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case 2:
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reg_map = wm8351_mode2_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
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case 3:
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reg_map = wm8351_mode3_defaults;
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break;
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#endif
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default:
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dev_err(wm8350->dev,
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"WM8351 configuration mode %d not supported\n",
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mode);
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return -EINVAL;
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}
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break;
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case 2:
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switch (mode) {
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#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
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case 0:
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reg_map = wm8352_mode0_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
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case 1:
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reg_map = wm8352_mode1_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
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case 2:
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reg_map = wm8352_mode2_defaults;
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break;
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#endif
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#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
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case 3:
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reg_map = wm8352_mode3_defaults;
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break;
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#endif
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default:
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dev_err(wm8350->dev,
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"WM8352 configuration mode %d not supported\n",
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mode);
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return -EINVAL;
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}
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break;
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default:
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dev_err(wm8350->dev,
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"WM835x configuration mode %d not supported\n",
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mode);
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|
return -EINVAL;
|
|
}
|
|
|
|
wm8350->reg_cache =
|
|
kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
|
|
if (wm8350->reg_cache == NULL)
|
|
return -ENOMEM;
|
|
|
|
/* Read the initial cache state back from the device - this is
|
|
* a PMIC so the device many not be in a virgin state and we
|
|
* can't rely on the silicon values.
|
|
*/
|
|
ret = regmap_raw_read(wm8350->regmap, 0, wm8350->reg_cache,
|
|
sizeof(u16) * (WM8350_MAX_REGISTER + 1));
|
|
if (ret < 0) {
|
|
dev_err(wm8350->dev,
|
|
"failed to read initial cache values\n");
|
|
goto out;
|
|
}
|
|
|
|
/* Mask out uncacheable/unreadable bits and the audio. */
|
|
for (i = 0; i < WM8350_MAX_REGISTER; i++) {
|
|
if (wm8350_reg_io_map[i].readable &&
|
|
(i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
|
|
value = be16_to_cpu(wm8350->reg_cache[i]);
|
|
value &= wm8350_reg_io_map[i].readable;
|
|
wm8350->reg_cache[i] = value;
|
|
} else
|
|
wm8350->reg_cache[i] = reg_map[i];
|
|
}
|
|
|
|
out:
|
|
kfree(wm8350->reg_cache);
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Register a client device. This is non-fatal since there is no need to
|
|
* fail the entire device init due to a single platform device failing.
|
|
*/
|
|
static void wm8350_client_dev_register(struct wm8350 *wm8350,
|
|
const char *name,
|
|
struct platform_device **pdev)
|
|
{
|
|
int ret;
|
|
|
|
*pdev = platform_device_alloc(name, -1);
|
|
if (*pdev == NULL) {
|
|
dev_err(wm8350->dev, "Failed to allocate %s\n", name);
|
|
return;
|
|
}
|
|
|
|
(*pdev)->dev.parent = wm8350->dev;
|
|
platform_set_drvdata(*pdev, wm8350);
|
|
ret = platform_device_add(*pdev);
|
|
if (ret != 0) {
|
|
dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
|
|
platform_device_put(*pdev);
|
|
*pdev = NULL;
|
|
}
|
|
}
|
|
|
|
int wm8350_device_init(struct wm8350 *wm8350, int irq,
|
|
struct wm8350_platform_data *pdata)
|
|
{
|
|
int ret;
|
|
unsigned int id1, id2, mask_rev;
|
|
unsigned int cust_id, mode, chip_rev;
|
|
|
|
dev_set_drvdata(wm8350->dev, wm8350);
|
|
|
|
/* get WM8350 revision and config mode */
|
|
ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1);
|
|
if (ret != 0) {
|
|
dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
|
|
goto err;
|
|
}
|
|
|
|
ret = regmap_read(wm8350->regmap, WM8350_ID, &id2);
|
|
if (ret != 0) {
|
|
dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
|
|
goto err;
|
|
}
|
|
|
|
ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev);
|
|
if (ret != 0) {
|
|
dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
|
|
goto err;
|
|
}
|
|
|
|
if (id1 != 0x6143) {
|
|
dev_err(wm8350->dev,
|
|
"Device with ID %x is not a WM8350\n", id1);
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
|
|
mode = id2 & WM8350_CONF_STS_MASK >> 10;
|
|
cust_id = id2 & WM8350_CUST_ID_MASK;
|
|
chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
|
|
dev_info(wm8350->dev,
|
|
"CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
|
|
mode, cust_id, mask_rev, chip_rev);
|
|
|
|
if (cust_id != 0) {
|
|
dev_err(wm8350->dev, "Unsupported CUST_ID\n");
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
|
|
switch (mask_rev) {
|
|
case 0:
|
|
wm8350->pmic.max_dcdc = WM8350_DCDC_6;
|
|
wm8350->pmic.max_isink = WM8350_ISINK_B;
|
|
|
|
switch (chip_rev) {
|
|
case WM8350_REV_E:
|
|
dev_info(wm8350->dev, "WM8350 Rev E\n");
|
|
break;
|
|
case WM8350_REV_F:
|
|
dev_info(wm8350->dev, "WM8350 Rev F\n");
|
|
break;
|
|
case WM8350_REV_G:
|
|
dev_info(wm8350->dev, "WM8350 Rev G\n");
|
|
wm8350->power.rev_g_coeff = 1;
|
|
break;
|
|
case WM8350_REV_H:
|
|
dev_info(wm8350->dev, "WM8350 Rev H\n");
|
|
wm8350->power.rev_g_coeff = 1;
|
|
break;
|
|
default:
|
|
/* For safety we refuse to run on unknown hardware */
|
|
dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
break;
|
|
|
|
case 1:
|
|
wm8350->pmic.max_dcdc = WM8350_DCDC_4;
|
|
wm8350->pmic.max_isink = WM8350_ISINK_A;
|
|
|
|
switch (chip_rev) {
|
|
case 0:
|
|
dev_info(wm8350->dev, "WM8351 Rev A\n");
|
|
wm8350->power.rev_g_coeff = 1;
|
|
break;
|
|
|
|
case 1:
|
|
dev_info(wm8350->dev, "WM8351 Rev B\n");
|
|
wm8350->power.rev_g_coeff = 1;
|
|
break;
|
|
|
|
default:
|
|
dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
wm8350->pmic.max_dcdc = WM8350_DCDC_6;
|
|
wm8350->pmic.max_isink = WM8350_ISINK_B;
|
|
|
|
switch (chip_rev) {
|
|
case 0:
|
|
dev_info(wm8350->dev, "WM8352 Rev A\n");
|
|
wm8350->power.rev_g_coeff = 1;
|
|
break;
|
|
|
|
default:
|
|
dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
dev_err(wm8350->dev, "Unknown MASK_REV\n");
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
|
|
ret = wm8350_create_cache(wm8350, mask_rev, mode);
|
|
if (ret < 0) {
|
|
dev_err(wm8350->dev, "Failed to create register cache\n");
|
|
return ret;
|
|
}
|
|
|
|
mutex_init(&wm8350->auxadc_mutex);
|
|
init_completion(&wm8350->auxadc_done);
|
|
|
|
ret = wm8350_irq_init(wm8350, irq, pdata);
|
|
if (ret < 0)
|
|
goto err_free;
|
|
|
|
if (wm8350->irq_base) {
|
|
ret = request_threaded_irq(wm8350->irq_base +
|
|
WM8350_IRQ_AUXADC_DATARDY,
|
|
NULL, wm8350_auxadc_irq, 0,
|
|
"auxadc", wm8350);
|
|
if (ret < 0)
|
|
dev_warn(wm8350->dev,
|
|
"Failed to request AUXADC IRQ: %d\n", ret);
|
|
}
|
|
|
|
if (pdata && pdata->init) {
|
|
ret = pdata->init(wm8350);
|
|
if (ret != 0) {
|
|
dev_err(wm8350->dev, "Platform init() failed: %d\n",
|
|
ret);
|
|
goto err_irq;
|
|
}
|
|
}
|
|
|
|
wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
|
|
|
|
wm8350_client_dev_register(wm8350, "wm8350-codec",
|
|
&(wm8350->codec.pdev));
|
|
wm8350_client_dev_register(wm8350, "wm8350-gpio",
|
|
&(wm8350->gpio.pdev));
|
|
wm8350_client_dev_register(wm8350, "wm8350-hwmon",
|
|
&(wm8350->hwmon.pdev));
|
|
wm8350_client_dev_register(wm8350, "wm8350-power",
|
|
&(wm8350->power.pdev));
|
|
wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
|
|
wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
|
|
|
|
return 0;
|
|
|
|
err_irq:
|
|
wm8350_irq_exit(wm8350);
|
|
err_free:
|
|
kfree(wm8350->reg_cache);
|
|
err:
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(wm8350_device_init);
|
|
|
|
void wm8350_device_exit(struct wm8350 *wm8350)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
|
|
platform_device_unregister(wm8350->pmic.led[i].pdev);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
|
|
platform_device_unregister(wm8350->pmic.pdev[i]);
|
|
|
|
platform_device_unregister(wm8350->wdt.pdev);
|
|
platform_device_unregister(wm8350->rtc.pdev);
|
|
platform_device_unregister(wm8350->power.pdev);
|
|
platform_device_unregister(wm8350->hwmon.pdev);
|
|
platform_device_unregister(wm8350->gpio.pdev);
|
|
platform_device_unregister(wm8350->codec.pdev);
|
|
|
|
if (wm8350->irq_base)
|
|
free_irq(wm8350->irq_base + WM8350_IRQ_AUXADC_DATARDY, wm8350);
|
|
|
|
wm8350_irq_exit(wm8350);
|
|
|
|
kfree(wm8350->reg_cache);
|
|
}
|
|
EXPORT_SYMBOL_GPL(wm8350_device_exit);
|
|
|
|
MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
|
|
MODULE_LICENSE("GPL");
|