Jayachandran C 51d1eac0cd MIPS: Netlogic: SMP wakeup code update ... Update for core intialization code. Initialize status register after receiving NMI for CPU wakeup. Add the low level L1D flush code before enabling threads in core. Also convert the ehb to _ehb so that it works under more GCC versions. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3755/ Patchwork: https://patchwork.linux-mips.org/patch/4095/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2012-07-24 17:28:47 +02:00
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xlp-hal	MIPS: Netlogic: SMP wakeup code update	2012-07-24 17:28:47 +02:00
xlr	MIPS: Netlogic: Merge some of XLR/XLP wakup code	2011-12-07 22:04:56 +00:00
common.h	MIPS: Netlogic: Merge some of XLR/XLP wakup code	2011-12-07 22:04:56 +00:00
haldefs.h	MIPS: Netlogic: Add XLP platform files for XLP SoC	2011-12-07 22:04:56 +00:00
interrupt.h	MIPS: Platform files for XLR/XLS processor support	2011-05-19 09:55:40 +01:00
mips-extns.h	MIPS: Platform files for XLR/XLS processor support	2011-05-19 09:55:40 +01:00
psb-bootinfo.h	MIPS: Platform files for XLR/XLS processor support	2011-05-19 09:55:40 +01:00