Chen-Yu Tsai 515c1a4bdc clk: sunxi: Add A23 clocks support ... The clock control unit on the A23 is similar to the one found on the A31. The AHB1, APB1, APB2 gates on the A23 are almost identical to the ones on the A31, but some outputs are missing. The main CPU PLL (PLL1) however is like that on older Allwinner SoCs, such as the A10 or A20, but the N factor starts from 1 instead of 0. This patch adds support for PLL1 and all the basic clock muxes and gates. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>		2014-07-04 12:05:17 +02:00
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clk-a10-hosc.c	clk: sunxi: Move the 24M oscillator to a file of its own	2014-06-11 09:58:44 +02:00
clk-a20-gmac.c	clk: sunxi: Move the GMAC clock to a file of its own	2014-06-11 09:58:44 +02:00
clk-factors.c	clk: sunxi: Support factor clocks with N factor starting not from 0	2014-07-04 12:05:12 +02:00
clk-factors.h	clk: sunxi: Support factor clocks with N factor starting not from 0	2014-07-04 12:05:12 +02:00
clk-sun6i-apb0-gates.c	clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support	2014-06-11 10:25:02 +02:00
clk-sun6i-apb0.c	clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support	2014-06-11 10:25:02 +02:00
clk-sun6i-ar100.c	clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support	2014-06-11 10:25:02 +02:00
clk-sunxi.c	clk: sunxi: Add A23 clocks support	2014-07-04 12:05:17 +02:00
Makefile	clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support	2014-06-11 10:25:02 +02:00