forked from Minki/linux
c3fcab3af4
- New board support: vf610-zii-dev-rev-c, imx6ul-opos6uldev,
imx6ul-isiot, imx6qdl-savageboard, imx6q-mccmon6.
- A patch from Alexandre to correct the mangled license text which
has been copied & pasted all over the i.MX device tree files.
- Update cpu nodes of some i.MX SoCs to make them consistent and match
ePAPR spec.
- Add OCOTP device for i.MX6UL SoC.
- Add security violation interrupt for i.MX25 DryIce.
- Enable USB OTG, WIFI and Bluetooth support for i.MX6SX Udoo Neo
board.
- Enable S/PDIF and 2nd display pipeline support for CompuLab board..
- Add SPI and LTC3676 PMIC support for Gateworks Ventana boards.
- A few random device addition for various boards: TVE DAC regulators
for imx53-qsb, EEPROM for vf610-zii-dev, eMMC and NAND support for
i.MX6UL Engicam boards.
- Cleanups on obsoleted or unused properties.
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Merge tag 'imx-dt-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree updates for 4.11:
- New board support: vf610-zii-dev-rev-c, imx6ul-opos6uldev,
imx6ul-isiot, imx6qdl-savageboard, imx6q-mccmon6.
- A patch from Alexandre to correct the mangled license text which
has been copied & pasted all over the i.MX device tree files.
- Update cpu nodes of some i.MX SoCs to make them consistent and match
ePAPR spec.
- Add OCOTP device for i.MX6UL SoC.
- Add security violation interrupt for i.MX25 DryIce.
- Enable USB OTG, WIFI and Bluetooth support for i.MX6SX Udoo Neo
board.
- Enable S/PDIF and 2nd display pipeline support for CompuLab board..
- Add SPI and LTC3676 PMIC support for Gateworks Ventana boards.
- A few random device addition for various boards: TVE DAC regulators
for imx53-qsb, EEPROM for vf610-zii-dev, eMMC and NAND support for
i.MX6UL Engicam boards.
- Cleanups on obsoleted or unused properties.
* tag 'imx-dt-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (32 commits)
ARM: dts: udoo_neo: Add Bluetooth support
ARM: dts: udoo_neo: Add Wifi support
ARM: dts: udoo_neo: Add UDOO Neo USB OTG1 and OTG2 support
ARM: dts: imx6ul: Add Engicam Is.IoT MX6UL NAND initial support
ARM: dts: imx6ul: Add Engicam Is.IoT MX6UL eMMC initial support
ARM: dts: imx6qdl: Fix "ERROR: code indent should use tabs where possible"
ARM: dts: vf610-zii-dev: add EEPROM entry to Rev C
ARM: dts: add Armadeus Systems OPOS6UL and OPOS6ULDEV support
ARM: dts: imx6q-utilite-pro: enable 2nd display pipeline
ARM: dts: vf610-zii-dev: Add .dts file for rev. C
ARM: dts: vf610-zii-dev-rev-b: Remove leftover PWM pingroup
ARM: dts: imx6: Support Savageboard quad
ARM: dts: imx6: Support Savageboard dual
ARM: dts: imx6: Add Savageboard common file
ARM: dts: imx53-qsb: Provide the TVE DAC regulators
ARM: dts: imx6q: Add mccmon6 board support
Doc: devicetree: bindings: Add vendor prefix entry - lwn
ARM: dts: imx/vf: Correct license text
ARM: dts: imx25.dtsi: DryIce security violation interrupt
ARM: dts: imx: Add ocotp node for imx6ul
...
Signed-off-by: Olof Johansson <olof@lixom.net>
149 lines
3.3 KiB
Plaintext
149 lines
3.3 KiB
Plaintext
/*
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* Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,arm1136jf-s";
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device_type = "cpu";
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reg = <0>;
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};
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};
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avic: interrupt-controller@68000000 {
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compatible = "fsl,imx31-avic", "fsl,avic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x68000000 0x100000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&avic>;
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ranges;
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aips@43f00000 { /* AIPS1 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x43f00000 0x100000>;
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ranges;
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uart1: serial@43f90000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43f90000 0x4000>;
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interrupts = <45>;
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clocks = <&clks 10>, <&clks 30>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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uart2: serial@43f94000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43f94000 0x4000>;
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interrupts = <32>;
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clocks = <&clks 10>, <&clks 31>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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kpp: kpp@43fa8000 {
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compatible = "fsl,imx31-kpp", "fsl,imx21-kpp";
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reg = <0x43fa8000 0x4000>;
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interrupts = <24>;
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clocks = <&clks 46>;
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status = "disabled";
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};
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uart4: serial@43fb0000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43fb0000 0x4000>;
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clocks = <&clks 10>, <&clks 49>;
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clock-names = "ipg", "per";
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interrupts = <46>;
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status = "disabled";
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};
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uart5: serial@43fb4000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43fb4000 0x4000>;
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interrupts = <47>;
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clocks = <&clks 10>, <&clks 50>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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};
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spba@50000000 {
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compatible = "fsl,spba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x50000000 0x100000>;
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ranges;
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uart3: serial@5000c000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x5000c000 0x4000>;
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interrupts = <18>;
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clocks = <&clks 10>, <&clks 48>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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iim: iim@5001c000 {
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compatible = "fsl,imx31-iim", "fsl,imx27-iim";
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reg = <0x5001c000 0x1000>;
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interrupts = <19>;
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clocks = <&clks 25>;
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};
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};
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aips@53f00000 { /* AIPS2 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x53f00000 0x100000>;
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ranges;
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clks: ccm@53f80000{
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compatible = "fsl,imx31-ccm";
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reg = <0x53f80000 0x4000>;
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interrupts = <31>, <53>;
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#clock-cells = <1>;
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};
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gpt: timer@53f90000 {
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compatible = "fsl,imx31-gpt";
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reg = <0x53f90000 0x4000>;
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interrupts = <29>;
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clocks = <&clks 10>, <&clks 22>;
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clock-names = "ipg", "per";
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};
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};
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};
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};
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