Eric Yang 44ce6c3dc8 drm/amd/display: update dispclk and dppclk vco frequency ... Value obtained from DV is not allowing 8k60 CTA mode with DSC to pass, after checking real value being used in hw, find out that correct value is 3600, which will allow that mode. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-12-05 18:23:04 -05:00
..
amdgpu_dm	drm/amd/display: add default clocks if not able to fetch them	2019-11-26 12:19:08 -05:00
dc	drm/amd/display: update dispclk and dppclk vco frequency	2019-12-05 18:23:04 -05:00
include	drm/amd/display: fixed that I2C over AUX didn't read data issue	2019-12-05 18:18:49 -05:00
modules	drm/amd/display: Fix screen tearing on vrr tests	2019-12-05 18:22:40 -05:00
Kconfig	drm/amd: Fix Kconfig indentation	2019-10-07 15:11:17 -05:00
Makefile	drm/amd/display: Add HDCP module	2019-10-03 09:10:58 -05:00
TODO