Rhyland Klein 3dad5c5fa1 clk: tegra: Fix pllx dyn step calculation ... The logic for calculating the input rate used when figuring out the proper dynamic steps for pllx was incorrect. It is supposed to be calculated using parent_rate / m but it was just using the parent rate directly, therefore using the wrong step values. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2016-02-02 15:49:24 +01:00
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clk-audio-sync.c
clk-dfll.c	clk: tegra: Changes for v4.4-rc1	2015-10-20 08:49:11 -07:00
clk-dfll.h	clk: tegra: Add Tegra124 DFLL clocksource platform driver	2015-07-16 10:39:45 +02:00
clk-divider.c	tegra/clk-divider: fix wrong do_div() usage	2015-11-16 12:37:55 -05:00
clk-emc.c	clk: tegra: delete unneeded of_node_put	2015-10-12 11:52:48 -07:00
clk-id.h	clk: tegra: Add support for Tegra210 clocks	2015-12-17 13:37:56 +01:00
clk-periph-gate.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-periph.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-pll-out.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-pll.c	clk: tegra: pll: Fix potential sleeping-while-atomic	2016-02-02 15:49:23 +01:00
clk-super.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-tegra20.c	clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate	2015-11-20 18:07:28 +01:00
clk-tegra30.c	clk: tegra: pll: Update PLLM handling	2015-11-20 18:07:35 +01:00
clk-tegra114.c	clk: tegra: pll: Update PLLM handling	2015-11-20 18:07:35 +01:00
clk-tegra124-dfll-fcpu.c	clk: tegra: Add Tegra124 DFLL clocksource platform driver	2015-07-16 10:39:45 +02:00
clk-tegra124.c	clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate	2015-11-20 18:07:28 +01:00
clk-tegra210.c	clk: tegra: Fix pllx dyn step calculation	2016-02-02 15:49:24 +01:00
clk-tegra-audio.c	clk: tegra: Modify tegra_audio_clk_init to accept more plls	2015-10-20 13:56:55 +02:00
clk-tegra-fixed.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-tegra-periph.c	clk: tegra: Fix the misnaming of nvenc from msenc	2016-02-02 15:49:22 +01:00
clk-tegra-pmc.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-tegra-super-gen4.c	clk: tegra: Add Super Gen5 Logic	2015-12-17 13:37:55 +01:00
clk.c	clk: tegra: Changes for v4.3-rc1	2015-08-25 15:55:28 -07:00
clk.h	clk: tegra: Add support for Tegra210 clocks	2015-12-17 13:37:56 +01:00
cvb.c	clk: tegra: Unlock top rates for Tegra124 DFLL clock	2015-09-15 12:54:39 +02:00
cvb.h	clk: tegra: Add functions for parsing CVB tables	2015-07-16 09:32:47 +02:00
Kconfig	clk: tegra: EMC clock driver depends on EMC driver	2015-05-13 15:17:13 +02:00
Makefile	clk: tegra: Add support for Tegra210 clocks	2015-12-17 13:37:56 +01:00