forked from Minki/linux
271a3024db
Commit ("766a1fe78fc3 ARM: omap3: Add missing memory node") added
the memory node, but the patch didn't have the correct starting address.
This patch fixes the correct starting address.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
245 lines
6.9 KiB
Plaintext
245 lines
6.9 KiB
Plaintext
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/input/input.h>
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/ {
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cpus {
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cpu@0 {
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cpu0-supply = <&vcc>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0>;
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};
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leds {
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compatible = "gpio-leds";
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user0 {
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label = "user0";
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gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */
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linux,default-trigger = "none";
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};
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};
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wl12xx_vmmc: wl12xx_vmmc {
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio5 29 0>; /* gpio157 */
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startup-delay-us = <70000>;
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enable-active-high;
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vin-supply = <&vmmc2>;
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};
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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linux,mtd-name = "micron,mt29f4g16abbda3w";
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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gpmc,device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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/* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
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x-loader@0 {
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label = "x-loader";
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reg = <0 0x80000>;
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};
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bootloaders@80000 {
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label = "u-boot";
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reg = <0x80000 0x1e0000>;
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};
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bootloaders_env@260000 {
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label = "u-boot-env";
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reg = <0x260000 0x20000>;
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};
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kernel@280000 {
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label = "kernel";
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reg = <0x280000 0x400000>;
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};
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filesystem@680000 {
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label = "fs";
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reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */
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};
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};
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};
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&i2c1 {
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clock-frequency = <2600000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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interrupt-parent = <&intc>;
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twl_audio: audio {
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compatible = "ti,twl4030-audio";
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codec {
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};
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};
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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};
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&i2c3 {
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clock-frequency = <400000>;
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at24@50 {
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compatible = "at24,24c02";
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readonly;
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reg = <0x50>;
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};
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};
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/*
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* Only found on the wireless SOM. For the SOM without wireless, the pins for
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* MMC3 can be routed with jumpers to the second MMC slot on the devkit and
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* gpio157 is not connected. So this should be OK to keep common for now,
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* probably device tree overlays is the way to go with the various SOM and
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* jumpering combinations for the long run.
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*/
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&mmc3 {
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interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
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pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&wl12xx_vmmc>;
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non-removable;
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bus-width = <4>;
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cap-power-off-card;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1283";
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reg = <2>;
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interrupt-parent = <&gpio5>;
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interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
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ref-clock-frequency = <26000000>;
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tcxo-clock-frequency = <26000000>;
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};
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};
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&omap3_pmx_core {
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mmc3_pins: pinmux_mm3_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
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OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
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OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
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OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
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OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
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OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr.gpio_157 */
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>;
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};
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mcbsp2_pins: pinmux_mcbsp2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
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OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
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OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
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OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
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>;
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};
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
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OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
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OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
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OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
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OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
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>;
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};
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mcspi1_pins: pinmux_mcspi1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
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OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
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OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
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OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
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>;
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};
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hsusb_otg_pins: pinmux_hsusb_otg_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
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OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
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OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
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OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
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OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
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OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
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OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
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OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
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OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
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OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
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OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
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OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
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>;
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};
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};
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&uart2 {
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interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&mcspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcspi1_pins>;
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};
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&omap3_pmx_core2 {
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mmc3_core2_pins: pinmux_mmc3_core2_pins {
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pinctrl-single,pins = <
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OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
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OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */
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>;
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};
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};
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#include "twl4030.dtsi"
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#include "twl4030_omap3.dtsi"
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&twl {
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twl_power: power {
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compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
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ti,use_poweroff;
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};
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};
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&twl_gpio {
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ti,use-leds;
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};
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