62ac983b61
Suggest by Arnd: abstract mmc tuning as clock behavior, also because different soc have different tuning method and registers. hi3620_mmc_clks is added to handle mmc clock specifically on hi3620. Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
47 lines
1.1 KiB
Plaintext
47 lines
1.1 KiB
Plaintext
Hisilicon Platforms Device Tree Bindings
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Hi4511 Board
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Required root node properties:
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- compatible = "hisilicon,hi3620-hi4511";
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Hisilicon system controller
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Required properties:
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- compatible : "hisilicon,sysctrl"
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- reg : Register address and size
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Optional properties:
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- smp-offset : offset in sysctrl for notifying slave cpu booting
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cpu 1, reg;
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cpu 2, reg + 0x4;
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cpu 3, reg + 0x8;
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If reg value is not zero, cpun exit wfi and go
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- resume-offset : offset in sysctrl for notifying cpu0 when resume
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- reboot-offset : offset in sysctrl for system reboot
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Example:
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/* for Hi3620 */
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sysctrl: system-controller@fc802000 {
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compatible = "hisilicon,sysctrl";
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reg = <0xfc802000 0x1000>;
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smp-offset = <0x31c>;
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resume-offset = <0x308>;
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reboot-offset = <0x4>;
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};
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PCTRL: Peripheral misc control register
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Required Properties:
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- compatible: "hisilicon,pctrl"
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- reg: Address and size of pctrl.
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Example:
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/* for Hi3620 */
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pctrl: pctrl@fca09000 {
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compatible = "hisilicon,pctrl";
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reg = <0xfca09000 0x1000>;
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};
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