forked from Minki/linux
6ebbf2ce43
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).
We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.
Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code. This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.
Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
197 lines
4.8 KiB
ArmAsm
197 lines
4.8 KiB
ArmAsm
/*
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* linux/arch/arm/lib/findbit.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* 16th March 2001 - John Ripley <jripley@sonicblue.com>
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* Fixed so that "size" is an exclusive not an inclusive quantity.
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* All users of these functions expect exclusive sizes, and may
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* also call with zero size.
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* Reworked by rmk.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.text
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/*
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* Purpose : Find a 'zero' bit
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* Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit);
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*/
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ENTRY(_find_first_zero_bit_le)
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teq r1, #0
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beq 3f
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mov r2, #0
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1:
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ARM( ldrb r3, [r0, r2, lsr #3] )
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THUMB( lsr r3, r2, #3 )
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THUMB( ldrb r3, [r0, r3] )
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eors r3, r3, #0xff @ invert bits
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bne .L_found @ any now set - found zero bit
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add r2, r2, #8 @ next bit pointer
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2: cmp r2, r1 @ any more?
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blo 1b
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3: mov r0, r1 @ no free bits
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ret lr
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ENDPROC(_find_first_zero_bit_le)
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/*
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* Purpose : Find next 'zero' bit
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* Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
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*/
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ENTRY(_find_next_zero_bit_le)
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teq r1, #0
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beq 3b
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ands ip, r2, #7
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beq 1b @ If new byte, goto old routine
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ARM( ldrb r3, [r0, r2, lsr #3] )
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THUMB( lsr r3, r2, #3 )
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THUMB( ldrb r3, [r0, r3] )
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eor r3, r3, #0xff @ now looking for a 1 bit
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movs r3, r3, lsr ip @ shift off unused bits
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bne .L_found
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orr r2, r2, #7 @ if zero, then no bits here
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add r2, r2, #1 @ align bit pointer
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b 2b @ loop for next bit
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ENDPROC(_find_next_zero_bit_le)
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/*
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* Purpose : Find a 'one' bit
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* Prototype: int find_first_bit(const unsigned long *addr, unsigned int maxbit);
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*/
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ENTRY(_find_first_bit_le)
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teq r1, #0
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beq 3f
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mov r2, #0
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1:
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ARM( ldrb r3, [r0, r2, lsr #3] )
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THUMB( lsr r3, r2, #3 )
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THUMB( ldrb r3, [r0, r3] )
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movs r3, r3
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bne .L_found @ any now set - found zero bit
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add r2, r2, #8 @ next bit pointer
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2: cmp r2, r1 @ any more?
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blo 1b
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3: mov r0, r1 @ no free bits
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ret lr
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ENDPROC(_find_first_bit_le)
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/*
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* Purpose : Find next 'one' bit
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* Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
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*/
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ENTRY(_find_next_bit_le)
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teq r1, #0
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beq 3b
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ands ip, r2, #7
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beq 1b @ If new byte, goto old routine
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ARM( ldrb r3, [r0, r2, lsr #3] )
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THUMB( lsr r3, r2, #3 )
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THUMB( ldrb r3, [r0, r3] )
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movs r3, r3, lsr ip @ shift off unused bits
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bne .L_found
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orr r2, r2, #7 @ if zero, then no bits here
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add r2, r2, #1 @ align bit pointer
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b 2b @ loop for next bit
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ENDPROC(_find_next_bit_le)
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#ifdef __ARMEB__
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ENTRY(_find_first_zero_bit_be)
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teq r1, #0
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beq 3f
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mov r2, #0
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1: eor r3, r2, #0x18 @ big endian byte ordering
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ARM( ldrb r3, [r0, r3, lsr #3] )
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THUMB( lsr r3, #3 )
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THUMB( ldrb r3, [r0, r3] )
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eors r3, r3, #0xff @ invert bits
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bne .L_found @ any now set - found zero bit
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add r2, r2, #8 @ next bit pointer
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2: cmp r2, r1 @ any more?
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blo 1b
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3: mov r0, r1 @ no free bits
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ret lr
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ENDPROC(_find_first_zero_bit_be)
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ENTRY(_find_next_zero_bit_be)
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teq r1, #0
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beq 3b
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ands ip, r2, #7
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beq 1b @ If new byte, goto old routine
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eor r3, r2, #0x18 @ big endian byte ordering
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ARM( ldrb r3, [r0, r3, lsr #3] )
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THUMB( lsr r3, #3 )
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THUMB( ldrb r3, [r0, r3] )
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eor r3, r3, #0xff @ now looking for a 1 bit
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movs r3, r3, lsr ip @ shift off unused bits
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bne .L_found
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orr r2, r2, #7 @ if zero, then no bits here
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add r2, r2, #1 @ align bit pointer
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b 2b @ loop for next bit
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ENDPROC(_find_next_zero_bit_be)
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ENTRY(_find_first_bit_be)
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teq r1, #0
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beq 3f
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mov r2, #0
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1: eor r3, r2, #0x18 @ big endian byte ordering
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ARM( ldrb r3, [r0, r3, lsr #3] )
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THUMB( lsr r3, #3 )
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THUMB( ldrb r3, [r0, r3] )
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movs r3, r3
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bne .L_found @ any now set - found zero bit
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add r2, r2, #8 @ next bit pointer
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2: cmp r2, r1 @ any more?
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blo 1b
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3: mov r0, r1 @ no free bits
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ret lr
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ENDPROC(_find_first_bit_be)
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ENTRY(_find_next_bit_be)
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teq r1, #0
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beq 3b
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ands ip, r2, #7
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beq 1b @ If new byte, goto old routine
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eor r3, r2, #0x18 @ big endian byte ordering
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ARM( ldrb r3, [r0, r3, lsr #3] )
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THUMB( lsr r3, #3 )
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THUMB( ldrb r3, [r0, r3] )
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movs r3, r3, lsr ip @ shift off unused bits
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bne .L_found
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orr r2, r2, #7 @ if zero, then no bits here
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add r2, r2, #1 @ align bit pointer
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b 2b @ loop for next bit
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ENDPROC(_find_next_bit_be)
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#endif
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/*
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* One or more bits in the LSB of r3 are assumed to be set.
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*/
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.L_found:
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#if __LINUX_ARM_ARCH__ >= 5
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rsb r0, r3, #0
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and r3, r3, r0
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clz r3, r3
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rsb r3, r3, #31
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add r0, r2, r3
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#else
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tst r3, #0x0f
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addeq r2, r2, #4
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movne r3, r3, lsl #4
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tst r3, #0x30
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addeq r2, r2, #2
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movne r3, r3, lsl #2
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tst r3, #0x40
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addeq r2, r2, #1
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mov r0, r2
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#endif
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cmp r1, r0 @ Clamp to maxbit
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movlo r0, r1
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ret lr
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