6a0e321ea7
In order to add meta-schema checks for additional/unevaluatedProperties being present, all schema need to make this explicit. As common/shared schema are included by other schemas, they should always allow for additionalProperties. Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Sebastian Reichel <sre@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20201005183830.486085-5-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
26 lines
551 B
YAML
26 lines
551 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: "http://devicetree.org/schemas/pci/cdns-pcie.yaml#"
|
|
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|
|
|
title: Cadence PCIe Core
|
|
|
|
maintainers:
|
|
- Tom Joseph <tjoseph@cadence.com>
|
|
|
|
properties:
|
|
phys:
|
|
description:
|
|
One per lane if more than one in the list. If only one PHY listed it must
|
|
manage all lanes.
|
|
minItems: 1
|
|
maxItems: 16
|
|
|
|
phy-names:
|
|
items:
|
|
- const: pcie-phy
|
|
# FIXME: names when more than 1
|
|
|
|
additionalProperties: true
|