acdf249f31
ip base could be different per ASIC since from soc15. split soc15 header into common ip/hw_id header and asic specific ip offset header Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
99 lines
5.5 KiB
C
99 lines
5.5 KiB
C
/*
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* Copyright (C) 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
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* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _soc15_hw_ip_HEADER
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#define _soc15_hw_ip_HEADER
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// HW ID
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#define MP1_HWID 1
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#define MP2_HWID 2
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#define THM_HWID 3
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#define SMUIO_HWID 4
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#define FUSE_HWID 5
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#define CLKA_HWID 6
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#define PWR_HWID 10
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#define GC_HWID 11
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#define UVD_HWID 12
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#define VCN_HWID UVD_HWID
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#define AUDIO_AZ_HWID 13
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#define ACP_HWID 14
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#define DCI_HWID 15
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#define DMU_HWID 271
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#define DCO_HWID 16
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#define DIO_HWID 272
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#define XDMA_HWID 17
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#define DCEAZ_HWID 18
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#define DAZ_HWID 274
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#define SDPMUX_HWID 19
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#define NTB_HWID 20
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#define IOHC_HWID 24
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#define L2IMU_HWID 28
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#define VCE_HWID 32
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#define MMHUB_HWID 34
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#define ATHUB_HWID 35
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#define DBGU_NBIO_HWID 36
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#define DFX_HWID 37
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#define DBGU0_HWID 38
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#define DBGU1_HWID 39
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#define OSSSYS_HWID 40
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#define HDP_HWID 41
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#define SDMA0_HWID 42
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#define SDMA1_HWID 43
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#define ISP_HWID 44
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#define DBGU_IO_HWID 45
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#define DF_HWID 46
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#define CLKB_HWID 47
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#define FCH_HWID 48
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#define DFX_DAP_HWID 49
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#define L1IMU_PCIE_HWID 50
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#define L1IMU_NBIF_HWID 51
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#define L1IMU_IOAGR_HWID 52
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#define L1IMU3_HWID 53
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#define L1IMU4_HWID 54
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#define L1IMU5_HWID 55
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#define L1IMU6_HWID 56
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#define L1IMU7_HWID 57
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#define L1IMU8_HWID 58
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#define L1IMU9_HWID 59
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#define L1IMU10_HWID 60
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#define L1IMU11_HWID 61
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#define L1IMU12_HWID 62
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#define L1IMU13_HWID 63
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#define L1IMU14_HWID 64
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#define L1IMU15_HWID 65
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#define WAFLC_HWID 66
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#define FCH_USB_PD_HWID 67
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#define PCIE_HWID 70
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#define PCS_HWID 80
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#define DDCL_HWID 89
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#define SST_HWID 90
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#define IOAGR_HWID 100
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#define NBIF_HWID 108
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#define IOAPIC_HWID 124
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#define SYSTEMHUB_HWID 128
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#define NTBCCP_HWID 144
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#define UMC_HWID 150
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#define SATA_HWID 168
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#define USB_HWID 170
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#define CCXSEC_HWID 176
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#define XGBE_HWID 216
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#define MP0_HWID 254
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#endif
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