Mikita Lipski 3722c79464 drm/amd/display: Implementing new bandwidth registers for DCE120 ... Registers are added and defined. Programmed to default values. Stutter level watermark register is being set to calculated value. Urgent level registers are programmed to the same as urgency. The programming of the registers is not expected to have any functional difference in performance. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-04-11 13:07:40 -05:00
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amdgpu_dm	drm/amd/display: Don't call amdgpu_dm_display_resume as it doesn't exist	2018-04-11 13:07:39 -05:00
dc	drm/amd/display: Implementing new bandwidth registers for DCE120	2018-04-11 13:07:40 -05:00
include	drm/amd/display: Implement stats logging	2018-03-14 15:08:47 -05:00
modules	drm/amd/display: add support for regkey "LCDFreeSyncDefault"	2018-03-14 15:16:34 -05:00
Kconfig	amdgpu/dm: Default PRE_VEGA ASIC support to 'y'	2018-03-16 16:16:50 -05:00
Makefile	drm/amd: Remove inclusion of non-existing include directories	2018-02-26 23:09:38 -05:00
TODO	drm/amd/display: Add TODO item to remove vector.c	2017-12-14 11:01:13 -05:00