3194c68701
Implement firmware download protocol for Marvell NFC controllers. This protocol is based on NCI frames that's why parts of its implementation use some NCI generic functions. Signed-off-by: Vincent Cuissard <cuissard@marvell.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
116 lines
2.9 KiB
C
116 lines
2.9 KiB
C
/**
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* Marvell NFC driver
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*
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* Copyright (C) 2014-2015, Marvell International Ltd.
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*
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* This software file (the "File") is distributed by Marvell International
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* Ltd. under the terms of the GNU General Public License Version 2, June 1991
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* (the "License"). You may use, redistribute and/or modify this File in
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* accordance with the terms and conditions of the License, a copy of which
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* is available on the worldwide web at
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
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*
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* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
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* ARE EXPRESSLY DISCLAIMED. The License provides additional details about
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* this warranty disclaimer.
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**/
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#ifndef _NFCMRVL_H_
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#define _NFCMRVL_H_
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#include <linux/platform_data/nfcmrvl.h>
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#include "fw_dnld.h"
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/* Define private flags: */
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#define NFCMRVL_NCI_RUNNING 1
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#define NFCMRVL_EXT_COEX_ID 0xE0
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#define NFCMRVL_NOT_ALLOWED_ID 0xE1
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#define NFCMRVL_ACTIVE_ID 0xE2
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#define NFCMRVL_EXT_COEX_ENABLE 1
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#define NFCMRVL_GPIO_PIN_NFC_NOT_ALLOWED 0xA
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#define NFCMRVL_GPIO_PIN_NFC_ACTIVE 0xB
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#define NFCMRVL_NCI_MAX_EVENT_SIZE 260
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/*
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** NCI FW Parmaters
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*/
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#define NFCMRVL_PB_BAIL_OUT 0x11
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#define NFCMRVL_PROP_REF_CLOCK 0xF0
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#define NFCMRVL_PROP_SET_HI_CONFIG 0xF1
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/*
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** HCI defines
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*/
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#define NFCMRVL_HCI_EVENT_HEADER_SIZE 0x04
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#define NFCMRVL_HCI_EVENT_CODE 0x04
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#define NFCMRVL_HCI_NFC_EVENT_CODE 0xFF
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#define NFCMRVL_HCI_COMMAND_CODE 0x01
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#define NFCMRVL_HCI_OGF 0x81
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#define NFCMRVL_HCI_OCF 0xFE
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enum nfcmrvl_phy {
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NFCMRVL_PHY_USB = 0,
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NFCMRVL_PHY_UART = 1,
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NFCMRVL_PHY_I2C = 2,
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NFCMRVL_PHY_SPI = 3,
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};
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struct nfcmrvl_private {
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unsigned long flags;
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/* Platform configuration */
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struct nfcmrvl_platform_data config;
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/* Parent dev */
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struct nci_dev *ndev;
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/* FW download context */
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struct nfcmrvl_fw_dnld fw_dnld;
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/* FW download support */
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bool support_fw_dnld;
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/*
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** PHY related information
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*/
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/* PHY driver context */
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void *drv_data;
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/* PHY device */
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struct device *dev;
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/* PHY type */
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enum nfcmrvl_phy phy;
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/* Low level driver ops */
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struct nfcmrvl_if_ops *if_ops;
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};
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struct nfcmrvl_if_ops {
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int (*nci_open) (struct nfcmrvl_private *priv);
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int (*nci_close) (struct nfcmrvl_private *priv);
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int (*nci_send) (struct nfcmrvl_private *priv, struct sk_buff *skb);
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void (*nci_update_config)(struct nfcmrvl_private *priv,
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const void *param);
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};
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void nfcmrvl_nci_unregister_dev(struct nfcmrvl_private *priv);
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int nfcmrvl_nci_recv_frame(struct nfcmrvl_private *priv, struct sk_buff *skb);
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struct nfcmrvl_private *nfcmrvl_nci_register_dev(void *drv_data,
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struct nfcmrvl_if_ops *ops,
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struct device *dev,
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struct nfcmrvl_platform_data *pdata);
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void nfcmrvl_chip_reset(struct nfcmrvl_private *priv);
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void nfcmrvl_chip_halt(struct nfcmrvl_private *priv);
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int nfcmrvl_parse_dt(struct device_node *node,
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struct nfcmrvl_platform_data *pdata);
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#endif
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