5cef8c2a22
Pull x86 boot updates from Ingo Molnar: - Centaur CPU updates (David Wang) - AMD and other CPU topology enumeration improvements and fixes (Borislav Petkov, Thomas Gleixner, Suravee Suthikulpanit) - Continued 5-level paging work (Kirill A. Shutemov) * 'x86-boot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mm: Mark __pgtable_l5_enabled __initdata x86/mm: Mark p4d_offset() __always_inline x86/mm: Introduce the 'no5lvl' kernel parameter x86/mm: Stop pretending pgtable_l5_enabled is a variable x86/mm: Unify pgtable_l5_enabled usage in early boot code x86/boot/compressed/64: Fix trampoline page table address calculation x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() x86/Centaur: Report correct CPU/cache topology x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() x86/CPU: Make intel_num_cpu_cores() generic x86/CPU: Move cpu local function declarations to local header x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available x86/CPU: Modify detect_extended_topology() to return result x86/CPU/AMD: Calculate last level cache ID from number of sharing threads x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present x86/Centaur: Initialize supported CPU features properly
66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ARCH_X86_CPU_H
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#define ARCH_X86_CPU_H
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/* attempt to consolidate cpu attributes */
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struct cpu_dev {
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const char *c_vendor;
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/* some have two possibilities for cpuid string */
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const char *c_ident[2];
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void (*c_early_init)(struct cpuinfo_x86 *);
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void (*c_bsp_init)(struct cpuinfo_x86 *);
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void (*c_init)(struct cpuinfo_x86 *);
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void (*c_identify)(struct cpuinfo_x86 *);
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void (*c_detect_tlb)(struct cpuinfo_x86 *);
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void (*c_bsp_resume)(struct cpuinfo_x86 *);
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int c_x86_vendor;
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#ifdef CONFIG_X86_32
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/* Optional vendor specific routine to obtain the cache size. */
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unsigned int (*legacy_cache_size)(struct cpuinfo_x86 *,
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unsigned int);
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/* Family/stepping-based lookup table for model names. */
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struct legacy_cpu_model_info {
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int family;
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const char *model_names[16];
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} legacy_models[5];
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#endif
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};
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struct _tlb_table {
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unsigned char descriptor;
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char tlb_type;
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unsigned int entries;
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/* unsigned int ways; */
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char info[128];
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};
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#define cpu_dev_register(cpu_devX) \
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static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \
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__attribute__((__section__(".x86_cpu_dev.init"))) = \
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&cpu_devX;
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extern const struct cpu_dev *const __x86_cpu_dev_start[],
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*const __x86_cpu_dev_end[];
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extern void get_cpu_cap(struct cpuinfo_x86 *c);
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extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
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extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
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extern u32 get_scattered_cpuid_leaf(unsigned int level,
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unsigned int sub_leaf,
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enum cpuid_regs_idx reg);
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extern void init_intel_cacheinfo(struct cpuinfo_x86 *c);
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extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
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extern void detect_num_cpu_cores(struct cpuinfo_x86 *c);
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extern int detect_extended_topology(struct cpuinfo_x86 *c);
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extern void detect_ht(struct cpuinfo_x86 *c);
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unsigned int aperfmperf_get_khz(int cpu);
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extern void x86_spec_ctrl_setup_ap(void);
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#endif /* ARCH_X86_CPU_H */
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