forked from Minki/linux
0160a4b689
This patch moves all Armada 370/XP/38x/39x SPI controller nodes from the 'internal-regs' node down into the 'soc' node. This is in preparation to enable the usage of the SPI direct access mode. A follow-up patch will add the static MBus mappings for the SPI devices into the 'reg' property of the SPI controller DT node. By moving these SPI controller nodes, this patch also makes use of the labels rather than keeping the tree structure. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
334 lines
6.9 KiB
Plaintext
334 lines
6.9 KiB
Plaintext
/*
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* Device Tree include file for Armada 385 based Linksys boards
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*
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* Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
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*
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "armada-385.dtsi"
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/ {
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model = "Linksys boards based on Armada 385";
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compatible = "linksys,armada385", "marvell,armada385",
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"marvell,armada380";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512 MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
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MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
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internal-regs {
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i2c@11000 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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tmp421@4c {
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compatible = "ti,tmp421";
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reg = <0x4c>;
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};
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pca9635@68 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "nxp,pca9635";
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reg = <0x68>;
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};
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};
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/* J10: VCC, NC, RX, NC, TX, GND */
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serial@12000 {
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status = "okay";
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};
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ethernet@70000 {
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status = "okay";
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phy-mode = "rgmii-id";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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ethernet@34000 {
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status = "okay";
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phy-mode = "sgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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mdio {
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status = "okay";
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};
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sata@a8000 {
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status = "okay";
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};
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/* USB part of the eSATA/USB 2.0 port */
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usb@58000 {
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status = "okay";
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};
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usb3@f8000 {
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status = "okay";
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usb-phy = <&usb3_phy>;
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};
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flash@d0000 {
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status = "okay";
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num-cs = <1>;
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marvell,nand-keep-config;
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marvell,nand-enable-arbiter;
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nand-on-flash-bbt;
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partition@0 {
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label = "u-boot";
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reg = <0x0000000 0x200000>; /* 2MB */
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read-only;
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};
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partition@100000 {
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label = "u_env";
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reg = <0x200000 0x40000>; /* 256KB */
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};
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partition@140000 {
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label = "s_env";
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reg = <0x240000 0x40000>; /* 256KB */
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};
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partition@900000 {
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label = "devinfo";
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reg = <0x900000 0x100000>; /* 1MB */
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read-only;
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};
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/* kernel1 overlaps with rootfs1 by design */
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partition@a00000 {
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label = "kernel1";
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reg = <0xa00000 0x2800000>; /* 40MB */
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};
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partition@1000000 {
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label = "rootfs1";
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reg = <0x1000000 0x2200000>; /* 34MB */
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};
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/* kernel2 overlaps with rootfs2 by design */
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partition@3200000 {
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label = "kernel2";
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reg = <0x3200000 0x2800000>; /* 40MB */
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};
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partition@3800000 {
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label = "rootfs2";
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reg = <0x3800000 0x2200000>; /* 34MB */
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};
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/*
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* 38MB, last MB is for the BBT, not writable
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*/
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partition@5a00000 {
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label = "syscfg";
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reg = <0x5a00000 0x2600000>;
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};
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/*
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* Unused area between "s_env" and "devinfo".
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* Moved here because otherwise the renumbered
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* partitions would break the bootloader
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* supplied bootargs
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*/
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partition@180000 {
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label = "unused_area";
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reg = <0x280000 0x680000>; /* 6.5MB */
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};
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};
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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/* Marvell 88W8864, 5GHz-only */
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status = "okay";
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};
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pcie@2,0 {
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/* Marvell 88W8864, 2GHz-only */
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status = "okay";
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};
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};
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};
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usb3_phy: usb3_phy {
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compatible = "usb-nop-xceiv";
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vcc-supply = <®_xhci0_vbus>;
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};
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reg_xhci0_vbus: xhci0-vbus {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&xhci0_vbus_pins>;
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regulator-name = "xhci0-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&keys_pin>;
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pinctrl-names = "default";
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button@1 {
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label = "WPS";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
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};
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button@2 {
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label = "Factory Reset Button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&power_led_pin &sata_led_pin>;
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pinctrl-names = "default";
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power {
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gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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sata {
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gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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dsa@0 {
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compatible = "marvell,dsa";
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#address-cells = <2>;
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#size-cells = <0>;
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dsa,ethernet = <ð2>;
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dsa,mii-bus = <&mdio>;
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switch@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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};
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};
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};
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};
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&pinctrl {
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keys_pin: keys-pin {
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marvell,pins = "mpp24", "mpp29";
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marvell,function = "gpio";
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};
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power_led_pin: power-led-pin {
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marvell,pins = "mpp55";
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marvell,function = "gpio";
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};
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sata_led_pin: sata-led-pin {
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marvell,pins = "mpp54";
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marvell,function = "gpio";
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};
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xhci0_vbus_pins: xhci0-vbus-pins {
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marvell,pins = "mpp50";
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marvell,function = "gpio";
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};
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};
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&spi0 {
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status = "disabled";
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};
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