Jaehyun Chung 2fdcc916ed drm/amd/display: Update DRAM watermark before checking to update TTU ... [Why] In most cases, DRAM watermark is large enough that the result of the condition to increase TTU doesn't change after DRAM watermark is increased. However, there is are cases where the condition fails and becomes true after DRAM watermark is increased. This results in minTTU < DRAM watermarks which leads to PSR hang since p-state is requested but not allowed. [How] Check whether to update TTU after DRAM watermark is updated. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-04-09 10:43:17 -04:00
..
dcn20	drm/amd/display: Update DRAM watermark before checking to update TTU	2020-04-09 10:43:17 -04:00
dcn21	drm/amd/display: use odm combine for YCbCr420 timing with h_active greater than 4096	2020-01-22 16:55:28 -05:00
dc_features.h	drm/amd/display: Fix dcn21 num_states	2020-03-31 12:26:15 -04:00
display_mode_enums.h	drm/amd/display: rename _lvp to l_vp	2020-01-16 14:15:28 -05:00
display_mode_lib.c	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag	2019-11-13 15:29:44 -05:00
display_mode_lib.h	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag	2019-11-13 15:29:44 -05:00
display_mode_structs.h	drm/amd/display: Fix dcn21 num_states	2020-03-31 12:26:15 -04:00
display_mode_vba.c	drm/amd/display: correct dml surface size assignment	2020-02-25 11:09:32 -05:00
display_mode_vba.h	drm/amd/display: remove unused dml variable	2020-02-25 11:08:53 -05:00
display_rq_dlg_helpers.c
display_rq_dlg_helpers.h
dml1_display_rq_dlg_calc.c
dml1_display_rq_dlg_calc.h
dml_common_defs.c	drm/amd/display: fixup DML dependencies	2020-01-16 14:16:48 -05:00
dml_common_defs.h
dml_inline_defs.h	drm/amd/display: fixup DML dependencies	2020-01-16 14:16:48 -05:00
dml_logger.h
Makefile	amdgpu: Enable initial DCN support on POWER	2019-12-18 16:09:05 -05:00