forked from Minki/linux
8c7634c0ee
The fact that all supported boards use the same 33MHz crystal is a co-incidence. The Zynq PS support a range of crystal freqs so the hardcoded setting should be removed from the dtsi. Re-implement it on the board level. This prepares support for Zynq boards with different crystal frequencies (e.g. the Digilent ZYBO). Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
142 lines
2.4 KiB
Plaintext
142 lines
2.4 KiB
Plaintext
/*
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* Copyright (C) 2011 - 2014 Xilinx
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* Copyright (C) 2012 National Instruments Corp.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Zynq ZC702 Development Board";
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compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
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memory {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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chosen {
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bootargs = "console=ttyPS0,115200 earlyprintk";
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};
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leds {
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compatible = "gpio-leds";
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ds23 {
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label = "ds23";
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gpios = <&gpio0 10 0>;
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linux,default-trigger = "heartbeat";
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};
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};
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};
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&can0 {
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status = "okay";
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};
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&clkc {
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ps-clk-frequency = <33333333>;
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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};
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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i2cswitch@74 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x74>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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si570: clock-generator@5d {
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#clock-cells = <0>;
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compatible = "silabs,si570";
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temperature-stability = <50>;
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reg = <0x5d>;
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factory-fout = <156250000>;
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clock-frequency = <148500000>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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eeprom@54 {
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compatible = "at,24c08";
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reg = <0x54>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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gpio@21 {
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compatible = "ti,tca6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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hwmon@52 {
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compatible = "ti,ucd9248";
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reg = <52>;
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};
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hwmon@53 {
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compatible = "ti,ucd9248";
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reg = <53>;
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};
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hwmon@54 {
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compatible = "ti,ucd9248";
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reg = <54>;
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};
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};
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};
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};
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&sdhci0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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